mirror of https://github.com/YosysHQ/picorv32.git
Improvements in dhrystone "make timing"
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@ -6,9 +6,12 @@ TOOLCHAIN_PREFIX = riscv32-unknown-elf-
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test: testbench.exe dhry.hex
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vvp -N testbench.exe
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timing: timing.exe dhry.hex
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timing: timing.txt
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grep '^##' timing.txt | gawk 'x != "" {print x,$$3-y;} {x=$$2;y=$$3;}' | sort | uniq -c | \
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gawk '{printf("%03d-%-7s %2d %-8s (%d)\n",$$3,$$2,$$3,$$2,$$1);}' | sort | cut -c13-
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timing.txt: timing.exe dhry.hex
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vvp -N timing.exe > timing.txt
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grep '^##' timing.txt | gawk 'x != "" {print x,$$3-y;} {x=$$2;y=$$3;}' | sort | uniq -c | sort -k3 -n
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testbench.exe: testbench.v ../picorv32.v
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iverilog -o testbench.exe testbench.v ../picorv32.v
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@ -92,8 +92,8 @@ module testbench;
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$finish;
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end
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always @(posedge clk) begin
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if (uut.decoder_trigger_q && !uut.decoder_pseudo_trigger_q)
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$display("## %-s %d", uut.dbg_ascii_instr ? uut.dbg_ascii_instr : "x", uut.count_cycle);
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if (uut.dbg_next)
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$display("## %-s %d", uut.dbg_ascii_instr ? uut.dbg_ascii_instr : "pcpi", uut.count_cycle);
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end
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`endif
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endmodule
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