mirror of https://github.com/YosysHQ/picorv32.git
Rename "spiflash" example to "picosoc"
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@ -128,6 +128,11 @@ Simple instruction-level tests from [riscv-tests](https://github.com/riscv/riscv
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Another simple test firmware that runs the Dhrystone benchmark.
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#### picosoc/
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A simple example SoC using PicoRV32 that can execute code directly from a
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memory mapped SPI flash.
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#### scripts/
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Various scripts and examples for different (synthesis) tools and hardware architectures.
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@ -2,7 +2,7 @@
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testbench: testbench.vvp firmware.hex
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vvp -N $<
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testbench.vvp: spiflash.v spimemio.v testbench.v top.v ../picorv32.v
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testbench.vvp: spiflash.v spimemio.v testbench.v picosoc.v ../picorv32.v
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iverilog -s testbench -o $@ $^
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spiflash_tb: spiflash_tb.vvp firmware.hex
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@ -27,8 +27,8 @@ firmware.hex: firmware_vma.elf
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firmware.bin: firmware.elf
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riscv32-unknown-elf-objcopy -O binary firmware.elf firmware.bin
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design.blif: spimemio.v top.v ../picorv32.v
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yosys -ql design.log -p 'synth_ice40 -top top -blif design.blif' $^
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design.blif: spimemio.v picosoc.v ../picorv32.v
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yosys -ql design.log -p 'synth_ice40 -top picosoc -blif design.blif' $^
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design.asc: pinout.pcf design.blif
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arachne-pnr -d 8k -o design.asc -p pinout.pcf design.blif
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@ -1,6 +1,6 @@
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PicoRV32 SPI-Flash Demo
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=======================
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PicoSoC - A simple example SoC using PicoRV32
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=============================================
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This is a simple PicoRV32 example design that can run code directly from an SPI
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flash chip. This example design uses the Lattice iCE40-HX8K Breakout Board.
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@ -18,7 +18,7 @@ and upload them to a connected iCE40-HX8K Breakout Board.
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| File | Description |
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| --------------------------- | --------------------------------------------------------------- |
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| [top.v](top.v) | Top-level Verilog module for the design |
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| [picosoc.v](picosoc.v) | Top-level Verilog module for the design |
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| [spimemio.v](spimemio.v) | Memory controller that interfaces to external SPI flash |
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| [spiflash.v](spiflash.v) | Simulation model of an SPI flash (used by testbench.v) |
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| [testbench.v](testbench.v) | Simple test bench for the design (requires firmware.hex). |
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@ -1,5 +1,5 @@
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/*
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* Top-level for "spiflash" SoC demo
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* PicoSoC - A simple example SoC using PicoRV32
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*
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* Copyright (C) 2017 Clifford Wolf <clifford@clifford.at>
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*
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@ -17,7 +17,7 @@
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*
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*/
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module top (
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module picosoc (
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input clk,
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output trap,
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@ -1,5 +1,5 @@
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/*
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* A simple simulation model for an SPI flash
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* PicoSoC - A simple example SoC using PicoRV32
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*
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* Copyright (C) 2017 Clifford Wolf <clifford@clifford.at>
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*
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@ -1,5 +1,5 @@
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/*
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* A simple test bench for the SPI flash simulation model
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* PicoSoC - A simple example SoC using PicoRV32
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*
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* Copyright (C) 2017 Clifford Wolf <clifford@clifford.at>
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*
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@ -1,5 +1,5 @@
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/*
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* Interface module for SPI flash and PicoRV32 native memory interface
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* PicoSoC - A simple example SoC using PicoRV32
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*
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* Copyright (C) 2017 Clifford Wolf <clifford@clifford.at>
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*
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@ -1,5 +1,5 @@
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/*
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* Test bench for the "spiflash" SoC
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* PicoSoC - A simple example SoC using PicoRV32
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*
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* Copyright (C) 2017 Clifford Wolf <clifford@clifford.at>
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*
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@ -51,7 +51,7 @@ module testbench;
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end
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end
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top uut (
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picosoc uut (
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.clk (clk ),
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.gpio_i (gpio_i ),
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.gpio_o (gpio_o ),
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