mirror of https://github.com/YosysHQ/picorv32.git
Add riscv-formal alu/regs blackboxing
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picorv32.v
14
picorv32.v
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@ -1249,6 +1249,11 @@ module picorv32 #(
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BARREL_SHIFTER && (instr_srl || instr_srli || instr_sra || instr_srai):
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alu_out = alu_shr;
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endcase
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`ifdef RISCV_FORMAL_BLACKBOX_ALU
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alu_out_0 = $anyseq;
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alu_out = $anyseq;
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`endif
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end
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reg clear_prefetched_high_word_q;
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@ -1303,11 +1308,20 @@ module picorv32 #(
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always @* begin
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decoded_rs = 'bx;
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if (ENABLE_REGS_DUALPORT) begin
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`ifndef RISCV_FORMAL_BLACKBOX_REGS
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cpuregs_rs1 = decoded_rs1 ? cpuregs[decoded_rs1] : 0;
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cpuregs_rs2 = decoded_rs2 ? cpuregs[decoded_rs2] : 0;
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`else
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cpuregs_rs1 = decoded_rs1 ? $anyseq : 0;
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cpuregs_rs2 = decoded_rs2 ? $anyseq : 0;
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`endif
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end else begin
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decoded_rs = (cpu_state == cpu_state_ld_rs2) ? decoded_rs2 : decoded_rs1;
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`ifndef RISCV_FORMAL_BLACKBOX_REGS
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cpuregs_rs1 = decoded_rs ? cpuregs[decoded_rs] : 0;
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`else
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cpuregs_rs1 = decoded_rs ? $anyseq : 0;
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`endif
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cpuregs_rs2 = cpuregs_rs1;
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end
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end
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