mirror of https://github.com/YosysHQ/picorv32.git
Add PICORV32_TESTBUG_nnn ifdefs for testing purposes
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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picorv32.v
18
picorv32.v
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@ -1326,7 +1326,13 @@ module picorv32 #(
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`ifndef PICORV32_REGS
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`ifndef PICORV32_REGS
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always @(posedge clk) begin
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always @(posedge clk) begin
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if (resetn && cpuregs_write && latched_rd)
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if (resetn && cpuregs_write && latched_rd)
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`ifdef PICORV32_TESTBUG_001
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cpuregs[latched_rd ^ 1] <= cpuregs_wrdata;
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`elsif PICORV32_TESTBUG_002
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cpuregs[latched_rd] <= cpuregs_wrdata ^ 1;
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`else
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cpuregs[latched_rd] <= cpuregs_wrdata;
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cpuregs[latched_rd] <= cpuregs_wrdata;
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`endif
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end
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end
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always @* begin
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always @* begin
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@ -1995,8 +2001,16 @@ module picorv32 #(
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rvfi_rd_wdata <= 0;
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rvfi_rd_wdata <= 0;
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end else
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end else
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if (cpuregs_write && !irq_state) begin
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if (cpuregs_write && !irq_state) begin
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`ifdef PICORV32_TESTBUG_003
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rvfi_rd_addr <= latched_rd ^ 1;
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`else
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rvfi_rd_addr <= latched_rd;
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rvfi_rd_addr <= latched_rd;
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`endif
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`ifdef PICORV32_TESTBUG_004
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rvfi_rd_wdata <= latched_rd ? cpuregs_wrdata ^ 1 : 0;
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`else
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rvfi_rd_wdata <= latched_rd ? cpuregs_wrdata : 0;
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rvfi_rd_wdata <= latched_rd ? cpuregs_wrdata : 0;
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`endif
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end else
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end else
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if (rvfi_valid) begin
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if (rvfi_valid) begin
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rvfi_rd_addr <= 0;
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rvfi_rd_addr <= 0;
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@ -2037,7 +2051,11 @@ module picorv32 #(
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end
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end
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always @* begin
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always @* begin
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`ifdef PICORV32_TESTBUG_005
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rvfi_pc_wdata = (dbg_irq_call ? dbg_irq_ret : dbg_insn_addr) ^ 4;
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`else
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rvfi_pc_wdata = dbg_irq_call ? dbg_irq_ret : dbg_insn_addr;
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rvfi_pc_wdata = dbg_irq_call ? dbg_irq_ret : dbg_insn_addr;
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`endif
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rvfi_csr_mcycle_rmask = 0;
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rvfi_csr_mcycle_rmask = 0;
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rvfi_csr_mcycle_wmask = 0;
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rvfi_csr_mcycle_wmask = 0;
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