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Bugfix in C.ADDI4SPN implementation

This commit is contained in:
Clifford Wolf 2016-04-09 14:09:43 +02:00
parent f7435eca96
commit ef8014eebd
1 changed files with 2 additions and 2 deletions
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picorv32.v
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@ -240,7 +240,7 @@ module picorv32 #(
case (mem_rdata_latched[15:13]) case (mem_rdata_latched[15:13])
3'b000: begin // C.ADDI4SPN 3'b000: begin // C.ADDI4SPN
mem_rdata_q[14:12] <= 3'b000; mem_rdata_q[14:12] <= 3'b000;
mem_rdata_q[31:20] <= {mem_rdata_latched[10:7], mem_rdata_latched[12:11], mem_rdata_latched[5], mem_rdata_latched[6]}; mem_rdata_q[31:20] <= {mem_rdata_latched[10:7], mem_rdata_latched[12:11], mem_rdata_latched[5], mem_rdata_latched[6], 2'b00};
end end
3'b010: begin // C.LW 3'b010: begin // C.LW
mem_rdata_q[31:20] <= {mem_rdata_latched[5], mem_rdata_latched[12:10], mem_rdata_latched[6], 2'b00}; mem_rdata_q[31:20] <= {mem_rdata_latched[5], mem_rdata_latched[12:10], mem_rdata_latched[6], 2'b00};
@ -565,7 +565,7 @@ module picorv32 #(
3'b000: begin // C.ADDI4SPN 3'b000: begin // C.ADDI4SPN
is_alu_reg_imm <= |mem_rdata_latched[12:5]; is_alu_reg_imm <= |mem_rdata_latched[12:5];
decoded_rs1 <= 2; decoded_rs1 <= 2;
decoded_rd <= 8 + mem_rdata_latched[9:7]; decoded_rd <= 8 + mem_rdata_latched[4:2];
end end
3'b010: begin // C.LW 3'b010: begin // C.LW
is_lb_lh_lw_lbu_lhu <= 1; is_lb_lh_lw_lbu_lhu <= 1;