mirror of https://github.com/YosysHQ/picorv32.git
Do not wait for PCPI core when handling SCALL and SBREAK
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parent
38d51a3383
commit
fd18475e23
12
picorv32.v
12
picorv32.v
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@ -502,7 +502,7 @@ module picorv32 #(
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reg instr_lb, instr_lh, instr_lw, instr_lbu, instr_lhu, instr_sb, instr_sh, instr_sw;
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reg instr_addi, instr_slti, instr_sltiu, instr_xori, instr_ori, instr_andi, instr_slli, instr_srli, instr_srai;
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reg instr_add, instr_sub, instr_sll, instr_slt, instr_sltu, instr_xor, instr_srl, instr_sra, instr_or, instr_and;
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reg instr_rdcycle, instr_rdcycleh, instr_rdinstr, instr_rdinstrh, instr_sbreak;
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reg instr_rdcycle, instr_rdcycleh, instr_rdinstr, instr_rdinstrh, instr_scall_sbreak;
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reg instr_getq, instr_setq, instr_retirq, instr_maskirq, instr_waitirq, instr_timer;
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wire instr_trap;
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@ -918,7 +918,7 @@ module picorv32 #(
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instr_rdinstr <= (mem_rdata_q[6:0] == 7'b1110011 && mem_rdata_q[31:12] == 'b11000000001000000010) && ENABLE_COUNTERS;
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instr_rdinstrh <= (mem_rdata_q[6:0] == 7'b1110011 && mem_rdata_q[31:12] == 'b11001000001000000010) && ENABLE_COUNTERS && ENABLE_COUNTERS64;
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instr_sbreak <= !CATCH_ILLINSN && ((mem_rdata_q[6:0] == 7'b1110011 && mem_rdata_q[31:7] == 'b0000000000010000000000000) ||
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instr_scall_sbreak <= ((mem_rdata_q[6:0] == 7'b1110011 && !mem_rdata_q[31:21] && !mem_rdata_q[19:7]) ||
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(COMPRESSED_ISA && mem_rdata_q[15:0] == 16'h9002));
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instr_getq <= mem_rdata_q[6:0] == 7'b0001011 && mem_rdata_q[31:25] == 7'b0000000 && ENABLE_IRQ && ENABLE_IRQ_QREGS;
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@ -1269,8 +1269,8 @@ module picorv32 #(
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latched_store <= pcpi_int_wr;
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cpu_state <= cpu_state_fetch;
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end else
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if (CATCH_ILLINSN && pcpi_timeout) begin
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pcpi_valid <= 0;
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if (CATCH_ILLINSN && (pcpi_timeout || instr_scall_sbreak)) begin
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pcpi_valid <= 0;
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`debug($display("SBREAK OR UNSUPPORTED INSN AT 0x%08x", reg_pc);)
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if (ENABLE_IRQ && !irq_mask[irq_sbreak] && !irq_active) begin
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next_irq_pending[irq_sbreak] = 1;
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@ -1419,7 +1419,7 @@ module picorv32 #(
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latched_store <= pcpi_int_wr;
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cpu_state <= cpu_state_fetch;
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end else
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if (CATCH_ILLINSN && pcpi_timeout) begin
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if (CATCH_ILLINSN && (pcpi_timeout || instr_scall_sbreak)) begin
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pcpi_valid <= 0;
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`debug($display("SBREAK OR UNSUPPORTED INSN AT 0x%08x", reg_pc);)
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if (ENABLE_IRQ && !irq_mask[irq_sbreak] && !irq_active) begin
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@ -1570,7 +1570,7 @@ module picorv32 #(
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end else
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cpu_state <= cpu_state_trap;
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end
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if (!CATCH_ILLINSN && decoder_trigger_q && !decoder_pseudo_trigger_q && instr_sbreak) begin
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if (!CATCH_ILLINSN && decoder_trigger_q && !decoder_pseudo_trigger_q && instr_scall_sbreak) begin
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cpu_state <= cpu_state_trap;
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end
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