mirror of https://github.com/YosysHQ/picorv32.git
138 lines
6.6 KiB
Makefile
138 lines
6.6 KiB
Makefile
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RISCV_GNU_TOOLCHAIN_REV = 7e48594
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NEWLIB_URL = ftp://sourceware.org/pub/newlib/newlib-2.2.0.tar.gz
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SHELL = bash
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TEST_OBJS = $(addsuffix .o,$(basename $(wildcard tests/*.S)))
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FIRMWARE_OBJS = firmware/start.o firmware/irq.o firmware/print.o firmware/sieve.o firmware/multest.o firmware/stats.o
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GCC_WARNS = -Werror -Wall -Wextra -Wshadow -Wundef -Wpointer-arith -Wcast-qual -Wcast-align -Wwrite-strings
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GCC_WARNS += -Wredundant-decls -Wstrict-prototypes -Wmissing-prototypes -pedantic # -Wconversion
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TOOLCHAIN_PREFIX = /opt/riscv32i/bin/riscv32-unknown-elf-
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COMPRESSED_ISA = C
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test: testbench.vvp firmware/firmware.hex
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vvp -N testbench.vvp
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testbench.vcd: testbench.vvp firmware/firmware.hex
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vvp -N $< +vcd
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view: testbench.vcd
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gtkwave $< testbench.gtkw
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check: check.smt2
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yosys-smtbmc -t 30 -c check.vcd check.smt2
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yosys-smtbmc -t 30 -c check.vcd -i check.smt2
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check.smt2: picorv32.v
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yosys -v2 -p 'read_verilog -formal picorv32.v' \
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-p 'prep -top picorv32 -nordff' \
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-p 'write_smt2 -bv -mem -wires check.smt2'
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test_sp: testbench_sp.vvp firmware/firmware.hex
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vvp -N testbench_sp.vvp
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test_axi: testbench.vvp firmware/firmware.hex
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vvp -N testbench.vvp +axi_test
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test_synth: testbench_synth.vvp firmware/firmware.hex
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vvp -N testbench_synth.vvp
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testbench.vvp: testbench.v picorv32.v
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iverilog -o testbench.vvp $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) testbench.v picorv32.v
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chmod -x testbench.vvp
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testbench_sp.vvp: testbench.v picorv32.v
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iverilog -o testbench_sp.vvp $(subst C,-DCOMPRESSED_ISA,$(COMPRESSED_ISA)) -DSP_TEST testbench.v picorv32.v
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chmod -x testbench_sp.vvp
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testbench_synth.vvp: testbench.v synth.v
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iverilog -o testbench_synth.vvp testbench.v synth.v
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chmod -x testbench_synth.vvp
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synth.v: picorv32.v scripts/yosys/synth_sim.ys
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yosys -qv3 -l synth.log scripts/yosys/synth_sim.ys
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firmware/firmware.hex: firmware/firmware.bin firmware/makehex.py
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python3 firmware/makehex.py $< 16384 > $@
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firmware/firmware.bin: firmware/firmware.elf
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$(TOOLCHAIN_PREFIX)objcopy -O binary $< $@
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chmod -x $@
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firmware/firmware.elf: $(FIRMWARE_OBJS) $(TEST_OBJS) firmware/sections.lds
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$(TOOLCHAIN_PREFIX)gcc -Os -m32 -ffreestanding -nostdlib -o $@ \
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-Wl,-Bstatic,-T,firmware/sections.lds,-Map,firmware/firmware.map,--strip-debug \
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$(FIRMWARE_OBJS) $(TEST_OBJS) -lgcc
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chmod -x $@
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firmware/start.o: firmware/start.S
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$(TOOLCHAIN_PREFIX)gcc -c -m32 -march=RV32IM$(COMPRESSED_ISA)Xcustom -o $@ $<
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firmware/%.o: firmware/%.c
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$(TOOLCHAIN_PREFIX)gcc -c -m32 -march=RV32I$(COMPRESSED_ISA) -Os --std=c99 $(GCC_WARNS) -ffreestanding -nostdlib -o $@ $<
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tests/%.o: tests/%.S tests/riscv_test.h tests/test_macros.h
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$(TOOLCHAIN_PREFIX)gcc -c -m32 -march=RV32IM -o $@ -DTEST_FUNC_NAME=$(notdir $(basename $<)) \
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-DTEST_FUNC_TXT='"$(notdir $(basename $<))"' -DTEST_FUNC_RET=$(notdir $(basename $<))_ret $<
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download-tools:
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sudo bash -c 'set -ex; mkdir -p /var/cache/distfiles; $(foreach URL,$(NEWLIB_URL), \
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if ! test -f /var/cache/distfiles/$(notdir $(URL)); then wget -O /var/cache/distfiles/$(notdir $(URL)).part $(URL); \
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mv /var/cache/distfiles/$(notdir $(URL)).part /var/cache/distfiles/$(notdir $(URL)); fi;) \
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$(foreach REPO,riscv-gnu-toolchain riscv-binutils-gdb riscv-dejagnu riscv-gcc riscv-glibc, \
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if ! test -d /var/cache/distfiles/$(REPO).git; then rm -rf /var/cache/distfiles/$(REPO).git.part; \
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git clone --bare https://github.com/riscv/$(REPO) /var/cache/distfiles/$(REPO).git.part; \
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mv /var/cache/distfiles/$(REPO).git.part /var/cache/distfiles/$(REPO).git; else \
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(cd /var/cache/distfiles/$(REPO).git; git fetch https://github.com/riscv/$(REPO)); fi;)'
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define build_tools_template
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build-$(1)-tools:
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@read -p "This will remove all existing data from /opt/$(1). Type YES to continue: " reply && [[ "$$$$reply" == [Yy][Ee][Ss] || "$$$$reply" == [Yy] ]]
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sudo bash -c "set -ex; rm -rf /opt/$(1); mkdir -p /opt/$(1); chown $$$${USER}. /opt/$(1)"
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$(MAKE) build-$(1)-tools-bh
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build-$(1)-tools-bh:
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+set -ex; \
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if [ -d /var/cache/distfiles/riscv-gnu-toolchain.git ]; then reference_riscv_gnu_toolchain="--reference /var/cache/distfiles/riscv-gnu-toolchain.git"; else reference_riscv_gnu_toolchain=""; fi; \
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if [ -d /var/cache/distfiles/riscv-binutils-gdb.git ]; then reference_riscv_binutils_gdb="--reference /var/cache/distfiles/riscv-binutils-gdb.git"; else reference_riscv_binutils_gdb=""; fi; \
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if [ -d /var/cache/distfiles/riscv-dejagnu.git ]; then reference_riscv_dejagnu="--reference /var/cache/distfiles/riscv-dejagnu.git"; else reference_riscv_dejagnu=""; fi; \
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if [ -d /var/cache/distfiles/riscv-gcc.git ]; then reference_riscv_gcc="--reference /var/cache/distfiles/riscv-gcc.git"; else reference_riscv_gcc=""; fi; \
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if [ -d /var/cache/distfiles/riscv-glibc.git ]; then reference_riscv_glibc="--reference /var/cache/distfiles/riscv-glibc.git"; else reference_riscv_glibc=""; fi; \
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rm -rf riscv-gnu-toolchain-$(1); git clone $$$$reference_riscv_gnu_toolchain https://github.com/riscv/riscv-gnu-toolchain riscv-gnu-toolchain-$(1); \
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cd riscv-gnu-toolchain-$(1); git checkout $(RISCV_GNU_TOOLCHAIN_REV); \
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git submodule update --init $$$$reference_riscv_binutils_gdb riscv-binutils-gdb; \
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git submodule update --init $$$$reference_riscv_dejagnu riscv-dejagnu; \
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git submodule update --init $$$$reference_riscv_gcc riscv-gcc; \
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git submodule update --init $$$$reference_riscv_glibc riscv-glibc; \
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mkdir build; cd build; ../configure --with-arch=$(2) --prefix=/opt/$(1); make
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.PHONY: build-$(1)-tools
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endef
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$(eval $(call build_tools_template,riscv32i,RV32I))
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$(eval $(call build_tools_template,riscv32ic,RV32IC))
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$(eval $(call build_tools_template,riscv32im,RV32IM))
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$(eval $(call build_tools_template,riscv32imc,RV32IMC))
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build-tools:
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@echo "This will remove all existing data from /opt/riscv32i, /opt/riscv32ic, /opt/riscv32im, and /opt/riscv32imc."
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@read -p "Type YES to continue: " reply && [[ "$$reply" == [Yy][Ee][Ss] || "$$reply" == [Yy] ]]
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sudo bash -c "set -ex; rm -rf /opt/riscv32{i,ic,im,imc}; mkdir -p /opt/riscv32{i,ic,im,imc}; chown $${USER}. /opt/riscv32{i,ic,im,imc}"
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$(MAKE) build-riscv32i-tools-bh
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$(MAKE) build-riscv32ic-tools-bh
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$(MAKE) build-riscv32im-tools-bh
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$(MAKE) build-riscv32imc-tools-bh
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toc:
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gawk '/^-+$$/ { y=tolower(x); gsub("[^a-z0-9]+", "-", y); gsub("-$$", "", y); printf("- [%s](#%s)\n", x, y); } { x=$$0; }' README.md
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clean:
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rm -rf riscv-gnu-toolchain-riscv32i riscv-gnu-toolchain-riscv32ic \
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riscv-gnu-toolchain-riscv32im riscv-gnu-toolchain-riscv32imc
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rm -vrf $(FIRMWARE_OBJS) $(TEST_OBJS) check.smt2 check.vcd synth.v synth.log \
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firmware/firmware.elf firmware/firmware.bin firmware/firmware.hex firmware/firmware.map \
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testbench.vvp testbench_sp.vvp testbench_synth.vvp testbench.vcd
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.PHONY: test view test_sp test_axi test_synth download-tools toc clean
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