mirror of https://github.com/YosysHQ/picorv32.git
66 lines
1.8 KiB
Makefile
66 lines
1.8 KiB
Makefile
USE_MYSTDLIB = 0
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OBJS = dhry_1.o dhry_2.o stdlib.o
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CFLAGS = -MD -O3 -m32 -march=RV32IM -DTIME -DRISCV
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TOOLCHAIN_PREFIX = /opt/riscv32im/bin/riscv32-unknown-elf-
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ifeq ($(USE_MYSTDLIB),1)
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CFLAGS += -DUSE_MYSTDLIB -ffreestanding -nostdlib
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OBJS += start.o
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else
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OBJS += syscalls.o
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endif
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test: testbench.vvp dhry.hex
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vvp -N testbench.vvp
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test_slow_mem: testbench_slow_mem.vvp dhry.hex
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vvp -N testbench_slow_mem.vvp
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timing: timing.txt
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grep '^##' timing.txt | gawk 'x != "" {print x,$$3-y;} {x=$$2;y=$$3;}' | sort | uniq -c | \
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gawk '{printf("%03d-%-7s %2d %-8s (%d)\n",$$3,$$2,$$3,$$2,$$1);}' | sort | cut -c13-
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timing.txt: timing.vvp dhry.hex
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vvp -N timing.vvp > timing.txt
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testbench.vvp: testbench.v ../picorv32.v
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iverilog -o testbench.vvp testbench.v ../picorv32.v
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chmod -x testbench.vvp
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testbench_slow_mem.vvp: testbench_slow_mem.v ../picorv32.v
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iverilog -o testbench_slow_mem.vvp testbench_slow_mem.v ../picorv32.v
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chmod -x testbench_slow_mem.vvp
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timing.vvp: testbench.v ../picorv32.v
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iverilog -o timing.vvp -DTIMING testbench.v ../picorv32.v
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chmod -x timing.vvp
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dhry.hex: dhry.elf
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$(TOOLCHAIN_PREFIX)objcopy -O verilog $< $@
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ifeq ($(USE_MYSTDLIB),1)
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dhry.elf: $(OBJS) sections.lds
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$(TOOLCHAIN_PREFIX)gcc $(CFLAGS) -Wl,-Bstatic,-T,sections.lds,-Map,dhry.map,--strip-debug -o $@ $(OBJS) -lgcc
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chmod -x $@
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else
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dhry.elf: $(OBJS)
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$(TOOLCHAIN_PREFIX)gcc $(CFLAGS) -Wl,-Bstatic,-Map,dhry.map,--strip-debug -o $@ $(OBJS) -lgcc -lc
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chmod -x $@
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endif
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%.o: %.c
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$(TOOLCHAIN_PREFIX)gcc -c $(CFLAGS) $<
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%.o: %.S
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$(TOOLCHAIN_PREFIX)gcc -c $(CFLAGS) $<
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dhry_1.o dhry_2.o: CFLAGS += -Wno-implicit-int -Wno-implicit-function-declaration
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clean:
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rm -rf *.o *.d dhry.elf dhry.map dhry.bin dhry.hex testbench.vvp testbench.vcd timing.vvp timing.txt testbench_slow_mem.vvp
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.PHONY: test clean
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-include *.d
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