mirror of https://github.com/YosysHQ/picorv32.git
93 lines
1.7 KiB
ArmAsm
93 lines
1.7 KiB
ArmAsm
// write RAM code (a sequence of nops followed by ret)
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li x5,0x00000013 // nop
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sw x5,4(x0)
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sw x5,8(x0)
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sw x5,12(x0)
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sw x5,16(x0)
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sw x5,20(x0)
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sw x5,24(x0)
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sw x5,28(x0)
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sw x5,32(x0)
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sw x5,36(x0)
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sw x5,40(x0)
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sw x5,44(x0)
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sw x5,48(x0)
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sw x5,52(x0)
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sw x5,56(x0)
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sw x5,60(x0)
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sw x5,64(x0)
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sw x5,68(x0)
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sw x5,72(x0)
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sw x5,76(x0)
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sw x5,80(x0)
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sw x5,84(x0)
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sw x5,88(x0)
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sw x5,92(x0)
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sw x5,96(x0)
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sw x5,100(x0)
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sw x5,104(x0)
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sw x5,108(x0)
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sw x5,112(x0)
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sw x5,116(x0)
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sw x5,120(x0)
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sw x5,124(x0)
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sw x5,128(x0)
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sw x5,132(x0)
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sw x5,136(x0)
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sw x5,140(x0)
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sw x5,144(x0)
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sw x5,148(x0)
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sw x5,152(x0)
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sw x5,156(x0)
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sw x5,160(x0)
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sw x5,164(x0)
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sw x5,168(x0)
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sw x5,172(x0)
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sw x5,176(x0)
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sw x5,180(x0)
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sw x5,184(x0)
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sw x5,188(x0)
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sw x5,192(x0)
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li x5,0x00008067 // ret
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sw x5,196(x0)
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#if 0
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// switch spimemio to continous qspi ddr mode
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li x5,0x02000000
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li x6,0x80000071
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sw x6,0(x5)
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#endif
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// setup gpio address in x5
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li x5,0x03000000
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sw x0,0(x5)
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// initial entry point into RAM code
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li x3,4
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// initialize RAM counter
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sw x0,0(x0)
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// start of loop. remember this address
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auipc x4,0
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// execute RAM code, come back here
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jalr x3
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// load counter and increment
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lw x6,0(x0)
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addi x6,x6,1
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// store counter and update gpios
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sw x6,0(x5)
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sw x6,0(x0)
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// calculate new entry point into RAM code
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slli x3,x6,2
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andi x3,x3,127
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addi x3,x3,32
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// execute RAM code, come back to start of loop
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mv x1,x4
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jr x3
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