Peter McGoron
5ff6b279b0
reverify math
2022-11-21 22:24:37 -05:00
Peter McGoron
5909f548d5
control loop simulator passes lint
2022-11-21 21:41:50 -05:00
Peter McGoron
0114c449c3
correct simulation of control loop
2022-11-19 12:55:55 -05:00
Peter McGoron
a0450fb0ff
control_loop_math: fix compile errors and verify simulation
2022-11-18 19:27:29 -05:00
Peter McGoron
0c10dc921c
more work on control_loop
...
* Make SPI masters internal to control loop module
* Rename commands to use I isntead of alpha
* add ADC value -> DAC value conversion to control loop math
2022-11-18 19:11:56 -05:00
Peter McGoron
50ea679e02
Rewrite control_loop_math and simulate
...
Replace specialized math nodes with single multiplier: each constant
must be resized to fit in the multiplier. Simplifies design at the
cost of speed.
2022-11-13 18:03:55 -05:00
Peter McGoron
88c42a9f4a
add printing of fixed point values in C++
2022-11-12 01:44:30 -05:00
Peter McGoron
45f815c5d3
changes
2022-11-11 21:57:58 -05:00
Peter McGoron
7a341a9632
yosys does not like calculated parameters
2022-10-30 15:37:45 -04:00
Peter McGoron
ba901a80d7
separate math into other file
2022-10-28 17:31:23 -04:00
Peter McGoron