244 lines
7.4 KiB
Python
244 lines
7.4 KiB
Python
#!/usr/bin/python3
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# Copyright 2023 (C) Peter McGoron
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#
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# This file is a part of Upsilon, a free and open source software project.
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# For license terms, refer to the files in `doc/copying` in the Upsilon
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# source distribution.
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#######################################################################
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#
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# This file generates a Micropython module "mmio" with functions that
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# do raw reads and writes to MMIO registers.
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#
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# TODO: Devicetree?
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import collections
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import argparse
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import json
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import sys
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class MMIORegister:
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def __init__(self, name, read_only=False, number=1, exntype=None):
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"""
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Describes a MMIO register.
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:param name: The name of the MMIO register, excluding the prefix
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defining its module (i.e. ``base_``) and excluding its
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numerical suffix.
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:param read_only: True if the register is read only. Defaults to
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``False``.
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:param number: The number of MMIO registers with the same name
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and number suffixes. The number suffixes must go from 0
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to ``number - 1`` with no gaps.
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"""
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self.name = name
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self.read_only = read_only
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self.number = number
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self.exntype = exntype
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# These are filled in by the CSR file.
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self.size = None
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def mmio_factory(num, exntype):
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"""
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Return a function that simplifies the creation of instances of
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:py:class:`MMIORegister` with the same number and exception type.
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:param num: Number of registers with the same name (minus suffix).
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:param exntype: MicroPython exception type.
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:return: A function ``f(name, read_only=False)``. Each argument is
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the same as the one in the initializer of py:class:`MMIORegister`.
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"""
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def f(name, read_only=False):
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return MMIORegister(name, read_only, number=num, exntype=exntype)
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return f
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class CSRHandler:
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"""
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Class that wraps the CSR file and fills in registers with information
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from those files.
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"""
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def __init__(self, csrjson, bitwidthjson, registers):
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"""
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Reads in the CSR files.
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:param csrjson: Filename of a LiteX "csr.json" file.
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:param bitwidthjson: Filename of an Upsilon "bitwidthjson" file.
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:param registers: A list of :py:class:`MMIORegister`s.
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:param outf: Output file.
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"""
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self.registers = registers
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self.csrs = json.load(open(csrjson))
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self.bws = json.load(open(bitwidthjson))
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def update_reg(self, reg):
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"""
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Fill in size information from bitwidth json file.
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:param reg: The register.
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:raises Exception: When the bit width exceeds 64.
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"""
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b = self.bws[reg.name]
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if b <= 8:
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reg.size = 8
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elif b <= 16:
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reg.size = 16
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elif b <= 32:
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reg.size = 32
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elif b <= 64:
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reg.size = 64
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else:
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raise Exception(f"unsupported width {b} in {reg.name}")
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def get_reg_addr(self, reg, num=None):
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"""
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Get address of register.
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:param reg: The register.
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:param num: Select which register number. Registers without
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numerical suffixes require ``None``.
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:return: The address.
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"""
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if num is None:
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regname = f"base_{reg.name}"
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else:
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regname = f"base_{reg.name}_{num}"
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return self.csrs["csr_registers"][regname]["addr"]
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class InterfaceGenerator:
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"""
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Interface for file generation. Implement the unimplemented functions
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to generate a CSR interface for another language.
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"""
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def __init__(self, csr, outf):
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"""
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:param CSRHandler csr:
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:param FileIO outf:
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"""
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self.outf = outf
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self.csr = csr
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def print(self, *args):
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"""
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Print to the file specified in the initializer and without
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newlines.
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"""
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print(*args, end='', file=self.outf)
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def fun(self, reg, optype):
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""" Print function for reads/writes to register. """
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pass
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def header(self):
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""" Print header of file. """
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pass
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def print_file(self):
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self.print(self.header())
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for r in self.csr.registers:
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self.print(self.fun(r, "read"))
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if not r.read_only:
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self.print(self.fun(r, "write"))
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class MicropythonGenerator(InterfaceGenerator):
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def __init__(self, *args, **kwargs):
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super().__init__(*args, **kwargs)
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def get_accessor(self, reg, num):
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addr = self.csr.get_reg_addr(reg, num)
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if reg.size in [8, 16, 32]:
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return [f"machine.mem{reg.size}[{addr}]"]
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return [f"machine.mem32[{addr}]", f"machine.mem32[{addr + 4}]"]
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def print_write_register(self, indent, varname, reg, num):
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acc = self.get_accessor(reg, num)
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if len(acc) == 1:
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return f'{indent}{acc[0]} = {varname}\n'
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else:
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assert len(acc) == 2
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# Little Endian. See linux kernel, include/linux/litex.h
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return f'{indent}{acc[1]} = {varname} & 0xFFFFFFFF\n' + \
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f'{indent}{acc[0]} = {varname} >> 32\n'
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def print_read_register(self, indent, varname, reg, num):
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acc = self.get_accessor(reg, num)
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if len(acc) == 1:
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return f'{indent}return {acc[0]}\n'
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else:
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assert len(acc) == 2
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return f'{indent}return {acc[0]} | ({acc[1]} << 32)\n'
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def fun(self, reg, optype):
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rs = ""
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def a(s):
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nonlocal rs
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rs = rs + s
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a(f'def {optype}_{reg.name}(')
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printed_argument = False
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if optype == 'write':
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a('val')
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printed_argument = True
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pfun = self.print_write_register
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else:
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pfun = self.print_read_register
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if reg.number != 1:
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if printed_argument:
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a(', ')
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a('num')
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a('):\n')
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if reg.number == 1:
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a(pfun('\t', 'val', reg, None))
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else:
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for i in range(0,reg.number):
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if i == 0:
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a(f'\tif ')
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else:
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a(f'\telif ')
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a(f'num == {i}:\n')
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a(pfun('\t\t', 'val', reg, i))
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a(f'\telse:\n')
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a(f'\t\traise {r.exntype}(regnum)\n')
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a('\n')
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return rs
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def header(self):
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return """import machine
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class InvalidDACException(Exception):
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pass
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class InvalidADCException(Exception):
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pass
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"""
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if __name__ == "__main__":
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dac_num = 8
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adc_num = 8
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dac_reg = mmio_factory(dac_num, "InvalidDACException")
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adc_reg = mmio_factory(adc_num, "InvalidADCException")
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registers = [
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dac_reg("dac_sel"),
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dac_reg("dac_finished", read_only=True),
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dac_reg("dac_arm"),
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dac_reg("dac_recv_buf", read_only=True),
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dac_reg("dac_send_buf"),
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adc_reg("adc_finished", read_only=True),
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adc_reg("adc_arm"),
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adc_reg("adc_recv_buf", read_only=True),
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adc_reg("adc_sel"),
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MMIORegister("cl_in_loop", read_only=True),
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MMIORegister("cl_cmd"),
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MMIORegister("cl_word_in"),
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MMIORegister("cl_word_out", read_only=True),
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MMIORegister("cl_start_cmd"),
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MMIORegister("cl_finish_cmd", read_only=True),
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MMIORegister("cl_z_report", read_only=True),
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]
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csrh = CSRHandler(sys.argv[1], sys.argv[2], registers)
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for r in registers:
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csrh.update_reg(r)
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MicropythonGenerator(csrh, sys.stdout).print_file()
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