Peter McGoron
2e98c0229d
1. Add a new Upsilon MicroPython standard library in the linux/ subdirectory. This puts all the submodules into classes with methods for ease of access. 2. Totally rewrite mmio.py code generation. Instead of just dumping registers, the build system now instantiates classes which encapsulate the module in question. 3. Split the PicoRV32 special register interface away from the PicoRV32. It is now the PeekPokeInterface, which will be used in the future to implement register control for Waveform and SPI. 4. Integrate Waveform into the design. Has not been tested yet. |
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boot | ||
build | ||
buildroot | ||
client | ||
doc | ||
gateware | ||
linux | ||
opensbi/litex/vexriscv | ||
swic | ||
.gitignore | ||
README.md |
README.md
upsilon
Upsilon is a 100% free and open source STM/AFM controller for FPGAs running Linux. Read doc/copying/README.md for license information.
Quickstart
Read doc/docker.md to set up the Docker build environment.
Project Organization
- boot: This folder is the central place for all built files. This includes the kernel image, rootfs, gateware, etc. This directory also includes everything the TFTP server has to access.
- build: Docker build environment.
- buildroot: Buildroot configuration files.
- doc: Documentation.
- doc/copying: Licenses.
- gateware: FPGA source.
- gateware/rtl: Verilog sources.
- gateware/rtl/spi: SPI code (from another repo)
- linux: Software that runs on the controller.
- opensbi: OpenSBI configuration files and source fragments.
- swic: Code that runs on the PicoRV32 soft core.