upsilon/.gitignore

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extdoc/
gateware/build/
gateware/csr.json
gateware/litex_json2dts_zephyr.py
gateware/overlay.config
gateware/overlay.cmake
gateware/overlay.dts
gateware/pin_io.c
misc/
software/build/
*.fst
obj_dir
*.fst.hier
*.swp
gateware/config.py
gateware/rtl/control_loop/control_loop_cmds.h
gateware/rtl/raster/ram_shim_cmds.h
gateware/rtl/raster/raster_cmds.h
gateware/rtl/base/base.v
gateware/rtl/control_loop/control_loop.v
gateware/rtl/control_loop/control_loop_cmds.vh
gateware/rtl/control_loop/control_loop_math.v
*_preprocessed.v
gateware/csr.repl
gateware/csr.resc
gateware/rtl/control_loop/slpp_all/
gateware/rtl/raster/.f4cache
gateware/rtl/raster/build/
gateware/rtl/raster/pack.log
gateware/rtl/raster/place.log
gateware/rtl/raster/route.log
gateware/rtl/raster/synth.log
gateware/rtl/raster/synth_test_yosys.v
gateware/rtl/raster/yosys_output
gateware/csr_bitwidth.json
boot/*
!boot/boot.json
*.tar.gz
build/buildroot/
build/f4pga/
build/litex/
build/opensbi/
build/upsilon/
swic/*.bin
swic/*.elf