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Free and open source SoC for Scanning Probe Microscopy
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Python 23.4%
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Peter McGoron f5b14d51ab picorv32 now runs: debugging outputs 2024-02-22 04:58:59 +00:00
boot sucessfully boot MAINLINE Linux! 2023-06-05 16:50:08 -04:00
build picorv32 now runs: debugging outputs 2024-02-22 04:58:59 +00:00
buildroot Moved network from to 192.168.2 because 192.168.1 is very common 2023-08-08 23:59:34 -04:00
client Moved network from to 192.168.2 because 192.168.1 is very common 2023-08-08 23:59:34 -04:00
doc Progress on PicoRV32 2024-02-20 15:36:53 +00:00
gateware picorv32 now runs: debugging outputs 2024-02-22 04:58:59 +00:00
linux z output reading 2023-06-27 17:50:55 -04:00
opensbi/litex/vexriscv refactor control loop interface 2023-06-28 17:38:41 -04:00
swic picorv32 now runs: debugging outputs 2024-02-22 04:58:59 +00:00
.gitignore more cleanup and bug finding 2024-02-08 12:57:22 +00:00
README.md update README.md 2024-02-04 17:00:35 +00:00

README.md

upsilon

Upsilon is a 100% free and open source STM/AFM controller for FPGAs running Linux. Read doc/copying/README.md for license information.

Quickstart

Read doc/docker.md to set up the Docker build environment.

Project Organization

  • boot: This folder is the central place for all built files. This includes the kernel image, rootfs, gateware, etc. This directory also includes everything the TFTP server has to access.
  • build: Docker build environment.
  • buildroot: Buildroot configuration files.
  • doc: Documentation.
  • doc/copying: Licenses.
  • gateware: FPGA source.
  • gateware/rtl: Verilog sources.
  • gateware/rtl/spi: SPI code (from another repo)
  • linux: Software that runs on the controller.
  • opensbi: OpenSBI configuration files and source fragments.
  • swic: Code that runs on the PicoRV32 soft core.