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f7d6fbee2f
upsilon
/
gateware
History
Peter McGoron
f7d6fbee2f
remove explicit finalize, is not needed and probably out of order
2024-02-04 14:50:19 +00:00
..
rtl
Minor SPI fixes and Interconnect fix
2024-02-03 00:33:52 +00:00
A7-constraints.xdc
firmware is a form of software; gateware is the equivalent for FGPAs
2023-06-14 15:31:49 -04:00
Makefile
Correctly finalize picorv32 module
2024-02-04 14:47:39 +00:00
csr2mp.py
refactor compiles
2023-06-28 18:49:26 -04:00
mmio_descr.py
Fixed spacing in assignment
2023-08-08 17:06:36 -04:00
soc.py
remove explicit finalize, is not needed and probably out of order
2024-02-04 14:50:19 +00:00