2023-02-07 12:46:44 -05:00
|
|
|
from creole import *
|
2023-02-07 12:25:52 -05:00
|
|
|
import unittest
|
2023-02-07 23:15:54 -05:00
|
|
|
import ffi
|
2023-02-07 12:25:52 -05:00
|
|
|
|
2023-02-08 08:56:39 -05:00
|
|
|
class PushTest(unittest.TestCase):
|
|
|
|
def test_parse_push_reg(self):
|
2023-02-07 12:25:52 -05:00
|
|
|
p = Program()
|
2023-02-08 08:56:39 -05:00
|
|
|
p.parse_asm_line("push r5")
|
2023-02-07 12:25:52 -05:00
|
|
|
b = p()
|
2023-02-09 11:16:41 -05:00
|
|
|
self.assertEqual(b, b'\x01\xC2\x85\x00')
|
2023-02-08 08:56:39 -05:00
|
|
|
ins = ffi.parse_line(b)
|
2023-02-09 11:32:32 -05:00
|
|
|
self.assertEqual(ins[0], Instruction.PUSH.opcode)
|
2023-02-08 08:56:39 -05:00
|
|
|
self.assertEqual(ins[1][0], (1,5))
|
|
|
|
|
2023-02-09 11:16:41 -05:00
|
|
|
def test_parse_push_imm(self):
|
2023-02-08 08:56:39 -05:00
|
|
|
p = Program()
|
2023-02-09 11:16:41 -05:00
|
|
|
p.parse_asm_line("push 5")
|
|
|
|
b = p()
|
|
|
|
self.assertEqual(b, b'\x01\xC0\x85\x00')
|
|
|
|
ins = ffi.parse_line(b)
|
2023-02-09 11:32:32 -05:00
|
|
|
self.assertEqual(ins[0], Instruction.PUSH.opcode)
|
2023-02-09 11:16:41 -05:00
|
|
|
self.assertEqual(ins[1][0], (0,5))
|
2023-02-08 08:56:39 -05:00
|
|
|
|
|
|
|
def test_parse_push_catch_typecheck_push_lab(self):
|
|
|
|
p = Program()
|
|
|
|
with self.assertRaises(TypecheckException) as cm:
|
|
|
|
p.parse_asm_line("push l0")
|
2023-02-09 11:16:41 -05:00
|
|
|
self.assertEqual(cm.exception.argtype, ArgType.VAL)
|
2023-02-08 08:56:39 -05:00
|
|
|
self.assertEqual(cm.exception.sarg, 'l0')
|
|
|
|
self.assertEqual(cm.exception.i, 0)
|
|
|
|
self.assertEqual(cm.exception.opcode, 1)
|
|
|
|
|
|
|
|
def test_parse_push_catch_typecheck_argument_overflow(self):
|
|
|
|
p = Program()
|
|
|
|
with self.assertRaises(TypecheckLenException) as cm:
|
|
|
|
p.parse_asm_line("push r1 r2")
|
|
|
|
self.assertEqual(cm.exception.opcode, 1)
|
|
|
|
self.assertEqual(cm.exception.insargs, ["r1", "r2"])
|
|
|
|
self.assertEqual(cm.exception.argtypelen, 1)
|
|
|
|
|
|
|
|
def test_parse_push_catch_typecheck_argument_underflow(self):
|
|
|
|
p = Program()
|
|
|
|
with self.assertRaises(TypecheckLenException) as cm:
|
|
|
|
p.parse_asm_line("push")
|
|
|
|
self.assertEqual(cm.exception.opcode, 1)
|
|
|
|
self.assertEqual(cm.exception.insargs, [])
|
|
|
|
self.assertEqual(cm.exception.argtypelen, 1)
|
|
|
|
|
2023-02-07 12:25:52 -05:00
|
|
|
def test_large_reg(self):
|
2023-02-11 12:27:29 -05:00
|
|
|
p = Program(reglen=0x8000000)
|
2023-02-07 12:25:52 -05:00
|
|
|
p.parse_asm_line("PUSH r134217727")
|
|
|
|
b = p()
|
2023-02-12 13:06:08 -05:00
|
|
|
self.assertEqual(b, b'\x01\xFC\x8f\xbf\xbf\xbf\xbf\x00')
|
2023-02-08 08:56:39 -05:00
|
|
|
|
2023-02-09 11:16:41 -05:00
|
|
|
def test_compile_push(self):
|
|
|
|
p = Program()
|
|
|
|
p.parse_asm_line("PUSH r0")
|
2023-02-09 11:32:32 -05:00
|
|
|
p.parse_asm_line("PUSH 6")
|
2023-02-09 11:16:41 -05:00
|
|
|
|
2023-02-11 15:49:39 -05:00
|
|
|
ex = ffi.Environment(p())
|
2023-02-09 11:16:41 -05:00
|
|
|
self.assertEqual(ex.cenv.prgend, 2)
|
|
|
|
|
|
|
|
self.assertEqual(ex.cenv.prg[0].opcode, 1)
|
|
|
|
self.assertEqual(ex.cenv.prg[0].w_flags[0], 1)
|
|
|
|
self.assertEqual(ex.cenv.prg[0].w_flags[1], 0)
|
|
|
|
self.assertEqual(ex.cenv.prg[0].w_flags[2], 0)
|
|
|
|
self.assertEqual(ex.cenv.prg[0].w[0], 0)
|
|
|
|
self.assertEqual(ex.cenv.prg[0].w[1], 0)
|
|
|
|
self.assertEqual(ex.cenv.prg[0].w[2], 0)
|
|
|
|
|
|
|
|
self.assertEqual(ex.cenv.prg[1].opcode, 1)
|
2023-02-09 11:32:32 -05:00
|
|
|
self.assertEqual(ex.cenv.prg[1].w_flags[0], 0)
|
2023-02-09 11:16:41 -05:00
|
|
|
self.assertEqual(ex.cenv.prg[1].w_flags[1], 0)
|
|
|
|
self.assertEqual(ex.cenv.prg[1].w_flags[2], 0)
|
|
|
|
self.assertEqual(ex.cenv.prg[1].w[0], 6)
|
|
|
|
self.assertEqual(ex.cenv.prg[1].w[1], 0)
|
|
|
|
self.assertEqual(ex.cenv.prg[1].w[2], 0)
|
|
|
|
|
2023-02-11 12:27:29 -05:00
|
|
|
def test_push_many(self):
|
|
|
|
p = Program()
|
|
|
|
stklen = 40
|
|
|
|
for n in range(0,stklen):
|
|
|
|
p.parse_asm_line("PUSH 5")
|
2023-02-11 15:49:39 -05:00
|
|
|
ex = ffi.Environment(p(), stklen=stklen)
|
2023-02-11 12:27:29 -05:00
|
|
|
self.assertEqual(ex(), ffi.RunRet.STOP)
|
|
|
|
for n in range(0,stklen):
|
2023-02-11 15:49:39 -05:00
|
|
|
self.assertEqual(ex.getstk(n), 5)
|
2023-02-11 12:27:29 -05:00
|
|
|
|
|
|
|
def test_push_overflow(self):
|
|
|
|
p = Program()
|
|
|
|
stklen = 40
|
|
|
|
for n in range(0, stklen + 1):
|
|
|
|
p.parse_asm_line("PUSH 5")
|
2023-02-11 15:49:39 -05:00
|
|
|
ex = ffi.Environment(p(), stklen=stklen)
|
2023-02-11 12:27:29 -05:00
|
|
|
self.assertEqual(ex(), ffi.RunRet.STACK_OVERFLOW)
|
|
|
|
|
2023-02-09 15:42:36 -05:00
|
|
|
class PopTest(unittest.TestCase):
|
|
|
|
def test_compile_pop_reg(self):
|
|
|
|
p = Program()
|
|
|
|
p.parse_asm_line("pop r9")
|
|
|
|
b = p()
|
|
|
|
self.assertEqual(b, b'\x02\xC2\x89\x00')
|
2023-02-11 15:49:39 -05:00
|
|
|
ex = ffi.Environment(b)
|
2023-02-09 15:42:36 -05:00
|
|
|
self.assertEqual(ex.cenv.prgend, 1)
|
|
|
|
|
|
|
|
self.assertEqual(ex.cenv.prg[0].opcode, 2)
|
|
|
|
self.assertEqual(ex.cenv.prg[0].w_flags[0], 1)
|
|
|
|
self.assertEqual(ex.cenv.prg[0].w_flags[1], 0)
|
|
|
|
self.assertEqual(ex.cenv.prg[0].w_flags[2], 0)
|
|
|
|
self.assertEqual(ex.cenv.prg[0].w[0], 9)
|
|
|
|
self.assertEqual(ex.cenv.prg[0].w[1], 0)
|
|
|
|
self.assertEqual(ex.cenv.prg[0].w[2], 0)
|
|
|
|
|
|
|
|
def test_compile_throw_pop_literal(self):
|
|
|
|
p = Program()
|
|
|
|
with self.assertRaises(TypecheckException) as cm:
|
|
|
|
p.parse_asm_line("pop 6")
|
|
|
|
self.assertEqual(cm.exception.argtype, ArgType.REG)
|
|
|
|
self.assertEqual(cm.exception.sarg, '6')
|
|
|
|
self.assertEqual(cm.exception.i, 0)
|
|
|
|
self.assertEqual(cm.exception.opcode, 2)
|
|
|
|
|
|
|
|
def test_compile_throw_pop_label(self):
|
|
|
|
p = Program()
|
|
|
|
with self.assertRaises(TypecheckException) as cm:
|
|
|
|
p.parse_asm_line("pop l9")
|
|
|
|
self.assertEqual(cm.exception.argtype, ArgType.REG)
|
|
|
|
self.assertEqual(cm.exception.sarg, 'l9')
|
|
|
|
self.assertEqual(cm.exception.i, 0)
|
|
|
|
self.assertEqual(cm.exception.opcode, 2)
|
|
|
|
|
|
|
|
def test_compile_throw_argument_overflow(self):
|
|
|
|
p = Program()
|
|
|
|
with self.assertRaises(TypecheckLenException) as cm:
|
2023-02-11 12:27:29 -05:00
|
|
|
p.parse_asm_line("pop r1 r2")
|
|
|
|
self.assertEqual(cm.exception.opcode, 2)
|
2023-02-09 15:42:36 -05:00
|
|
|
self.assertEqual(cm.exception.insargs, ["r1", "r2"])
|
|
|
|
self.assertEqual(cm.exception.argtypelen, 1)
|
|
|
|
|
|
|
|
def test_catch_typecheck_argument_underflow(self):
|
|
|
|
p = Program()
|
|
|
|
with self.assertRaises(TypecheckLenException) as cm:
|
2023-02-11 12:27:29 -05:00
|
|
|
p.parse_asm_line("pop")
|
|
|
|
self.assertEqual(cm.exception.opcode, 2)
|
2023-02-09 15:42:36 -05:00
|
|
|
self.assertEqual(cm.exception.insargs, [])
|
2023-02-11 12:27:29 -05:00
|
|
|
|
|
|
|
def test_pop_underflow(self):
|
|
|
|
p = Program()
|
|
|
|
p.parse_asm_line("pop r0")
|
2023-02-11 15:49:39 -05:00
|
|
|
ex = ffi.Environment(p())
|
2023-02-11 12:27:29 -05:00
|
|
|
self.assertEqual(ex(), ffi.RunRet.STACK_UNDERFLOW)
|
|
|
|
|
|
|
|
def test_pop_underflow_2(self):
|
|
|
|
p = Program()
|
|
|
|
p.parse_asm_line("push 5")
|
|
|
|
p.parse_asm_line("pop r0")
|
|
|
|
p.parse_asm_line("pop r1")
|
2023-02-11 15:49:39 -05:00
|
|
|
ex = ffi.Environment(p())
|
2023-02-11 12:27:29 -05:00
|
|
|
self.assertEqual(ex(), ffi.RunRet.STACK_UNDERFLOW)
|
2023-02-09 15:42:36 -05:00
|
|
|
|
2023-02-11 12:11:32 -05:00
|
|
|
class AddTest(unittest.TestCase):
|
|
|
|
def test_exec_add(self):
|
2023-02-07 12:44:44 -05:00
|
|
|
p = Program()
|
2023-02-11 12:11:32 -05:00
|
|
|
p.parse_asm_line("add r0 1 1")
|
2023-02-11 15:49:39 -05:00
|
|
|
ex = ffi.Environment(p())
|
2023-02-11 09:28:43 -05:00
|
|
|
self.assertEqual(ex(), ffi.RunRet.STOP)
|
2023-02-11 12:11:32 -05:00
|
|
|
self.assertEqual(ex.cenv.reg[0], 2)
|
2023-02-07 23:15:54 -05:00
|
|
|
|
2023-02-11 12:11:32 -05:00
|
|
|
def test_exec_add_neg(self):
|
2023-02-11 12:04:17 -05:00
|
|
|
p = Program()
|
|
|
|
p.parse_asm_line("add r0 10 20")
|
|
|
|
p.parse_asm_line("add r1 5 0")
|
|
|
|
p.parse_asm_line("add r1 r0 -40")
|
2023-02-11 15:49:39 -05:00
|
|
|
ex = ffi.Environment(p())
|
2023-02-11 12:04:17 -05:00
|
|
|
self.assertEqual(ex(), ffi.RunRet.STOP)
|
2023-02-11 15:49:39 -05:00
|
|
|
self.assertEqual(ex.getreg(0), 30)
|
|
|
|
self.assertEqual(ex.getreg(1), -10)
|
2023-02-11 12:04:17 -05:00
|
|
|
|
2023-02-11 12:36:15 -05:00
|
|
|
def test_exec_add_throw_imm(self):
|
2023-02-11 12:11:32 -05:00
|
|
|
p = Program()
|
|
|
|
with self.assertRaises(TypecheckException) as cm:
|
|
|
|
p.parse_asm_line("add 5 6 7")
|
|
|
|
self.assertEqual(cm.exception.argtype, ArgType.REG)
|
|
|
|
self.assertEqual(cm.exception.sarg, '5')
|
|
|
|
self.assertEqual(cm.exception.i, 0)
|
|
|
|
self.assertEqual(cm.exception.opcode, 3)
|
|
|
|
|
2023-02-11 12:36:15 -05:00
|
|
|
def test_exec_add_throw_lab_1(self):
|
2023-02-11 12:11:32 -05:00
|
|
|
p = Program()
|
|
|
|
with self.assertRaises(TypecheckException) as cm:
|
|
|
|
p.parse_asm_line("add r0 l6 7")
|
|
|
|
self.assertEqual(cm.exception.argtype, ArgType.VAL)
|
|
|
|
self.assertEqual(cm.exception.sarg, 'l6')
|
|
|
|
self.assertEqual(cm.exception.i, 1)
|
|
|
|
self.assertEqual(cm.exception.opcode, 3)
|
|
|
|
|
2023-02-11 12:36:15 -05:00
|
|
|
def test_exec_add_throw_lab_2(self):
|
2023-02-11 12:11:32 -05:00
|
|
|
p = Program()
|
|
|
|
with self.assertRaises(TypecheckException) as cm:
|
|
|
|
p.parse_asm_line("add r0 12 l24")
|
|
|
|
self.assertEqual(cm.exception.argtype, ArgType.VAL)
|
|
|
|
self.assertEqual(cm.exception.sarg, 'l24')
|
|
|
|
self.assertEqual(cm.exception.i, 2)
|
|
|
|
self.assertEqual(cm.exception.opcode, 3)
|
|
|
|
|
2023-02-11 12:27:29 -05:00
|
|
|
class MulTest(unittest.TestCase):
|
2023-02-11 12:11:32 -05:00
|
|
|
def test_exec_mul_imm_imm(self):
|
|
|
|
p = Program()
|
|
|
|
p.parse_asm_line("mul r0 2 2")
|
2023-02-11 15:49:39 -05:00
|
|
|
ex = ffi.Environment(p())
|
2023-02-11 12:11:32 -05:00
|
|
|
self.assertEqual(ex(), ffi.RunRet.STOP)
|
2023-02-11 15:49:39 -05:00
|
|
|
self.assertEqual(ex.getreg(0), 4)
|
2023-02-11 12:11:32 -05:00
|
|
|
|
|
|
|
def test_exec_mul_imm_neg_imm(self):
|
|
|
|
p = Program()
|
|
|
|
p.parse_asm_line("mul r0 -5 5")
|
|
|
|
p.parse_asm_line("mul r1 r0 -5")
|
2023-02-11 15:49:39 -05:00
|
|
|
ex = ffi.Environment(p())
|
2023-02-11 12:11:32 -05:00
|
|
|
self.assertEqual(ex(), ffi.RunRet.STOP)
|
2023-02-11 15:49:39 -05:00
|
|
|
self.assertEqual(ex.getreg(0), -25)
|
|
|
|
self.assertEqual(ex.getreg(1), 125)
|
2023-02-11 12:11:32 -05:00
|
|
|
|
2023-02-11 12:36:15 -05:00
|
|
|
def test_exec_mul_throw_imm(self):
|
|
|
|
p = Program()
|
|
|
|
with self.assertRaises(TypecheckException) as cm:
|
|
|
|
p.parse_asm_line("mul 942 6 7")
|
|
|
|
self.assertEqual(cm.exception.argtype, ArgType.REG)
|
|
|
|
self.assertEqual(cm.exception.sarg, '942')
|
|
|
|
self.assertEqual(cm.exception.i, 0)
|
|
|
|
self.assertEqual(cm.exception.opcode, 4)
|
|
|
|
|
|
|
|
def test_exec_mul_throw_lab_1(self):
|
|
|
|
p = Program()
|
|
|
|
with self.assertRaises(TypecheckException) as cm:
|
|
|
|
p.parse_asm_line("mul r9 l2 1991")
|
|
|
|
self.assertEqual(cm.exception.argtype, ArgType.VAL)
|
|
|
|
self.assertEqual(cm.exception.sarg, 'l2')
|
|
|
|
self.assertEqual(cm.exception.i, 1)
|
|
|
|
self.assertEqual(cm.exception.opcode, 4)
|
|
|
|
|
|
|
|
def test_exec_mul_throw_lab_2(self):
|
|
|
|
p = Program()
|
|
|
|
with self.assertRaises(TypecheckException) as cm:
|
|
|
|
p.parse_asm_line("mul r0 -11 l48")
|
|
|
|
self.assertEqual(cm.exception.argtype, ArgType.VAL)
|
|
|
|
self.assertEqual(cm.exception.sarg, 'l48')
|
|
|
|
self.assertEqual(cm.exception.i, 2)
|
|
|
|
self.assertEqual(cm.exception.opcode, 4)
|
|
|
|
|
2023-02-11 15:49:39 -05:00
|
|
|
class DivTest(unittest.TestCase):
|
|
|
|
def test_div(self):
|
|
|
|
p = Program()
|
|
|
|
p.parse_asm_line("div r0 8 4")
|
|
|
|
ex = ffi.Environment(p())
|
|
|
|
self.assertEqual(ex(), ffi.RunRet.STOP)
|
|
|
|
self.assertEqual(ex.getreg(0), 2)
|
|
|
|
|
|
|
|
def test_div_round_down(self):
|
|
|
|
p = Program()
|
|
|
|
p.parse_asm_line("div r0 8 10")
|
|
|
|
ex = ffi.Environment(p())
|
|
|
|
self.assertEqual(ex(), ffi.RunRet.STOP)
|
|
|
|
|
|
|
|
def test_div_by_zero(self):
|
|
|
|
p = Program()
|
|
|
|
p.parse_asm_line("div r0 8 0")
|
|
|
|
ex = ffi.Environment(p())
|
|
|
|
self.assertEqual(ex(), ffi.RunRet.DIVIDE_BY_ZERO)
|
|
|
|
|
2023-02-11 15:51:03 -05:00
|
|
|
def test_sdiv_by_zero(self):
|
2023-02-11 15:49:39 -05:00
|
|
|
p = Program()
|
2023-02-11 15:51:03 -05:00
|
|
|
p.parse_asm_line("sdiv r0 8 0")
|
2023-02-11 15:49:39 -05:00
|
|
|
ex = ffi.Environment(p())
|
|
|
|
self.assertEqual(ex(), ffi.RunRet.DIVIDE_BY_ZERO)
|
|
|
|
|
2023-02-11 15:51:03 -05:00
|
|
|
def test_sdiv_neg(self):
|
2023-02-11 15:49:39 -05:00
|
|
|
p = Program()
|
2023-02-11 15:51:03 -05:00
|
|
|
p.parse_asm_line("sdiv r0 16 -4")
|
|
|
|
p.parse_asm_line("sdiv r1 r0 -4")
|
2023-02-11 15:49:39 -05:00
|
|
|
ex = ffi.Environment(p())
|
|
|
|
self.assertEqual(ex(), ffi.RunRet.STOP)
|
|
|
|
self.assertEqual(ex.getreg(0), -4)
|
|
|
|
self.assertEqual(ex.getreg(1), 1)
|
|
|
|
|
|
|
|
def test_exec_div_throw_imm(self):
|
|
|
|
p = Program()
|
|
|
|
with self.assertRaises(TypecheckException) as cm:
|
|
|
|
p.parse_asm_line("div 5 1 2")
|
|
|
|
self.assertEqual(cm.exception.argtype, ArgType.REG)
|
|
|
|
self.assertEqual(cm.exception.sarg, '5')
|
|
|
|
self.assertEqual(cm.exception.i, 0)
|
|
|
|
self.assertEqual(cm.exception.opcode, 5)
|
|
|
|
|
|
|
|
def test_exec_div_throw_lab_1(self):
|
|
|
|
p = Program()
|
|
|
|
with self.assertRaises(TypecheckException) as cm:
|
|
|
|
p.parse_asm_line("div r0 l123 456")
|
|
|
|
self.assertEqual(cm.exception.argtype, ArgType.VAL)
|
|
|
|
self.assertEqual(cm.exception.sarg, 'l123')
|
|
|
|
self.assertEqual(cm.exception.i, 1)
|
|
|
|
self.assertEqual(cm.exception.opcode, 5)
|
|
|
|
|
|
|
|
def test_exec_div_throw_lab_2(self):
|
|
|
|
p = Program()
|
|
|
|
with self.assertRaises(TypecheckException) as cm:
|
|
|
|
p.parse_asm_line("div r5 1919 l24")
|
|
|
|
self.assertEqual(cm.exception.argtype, ArgType.VAL)
|
|
|
|
self.assertEqual(cm.exception.sarg, 'l24')
|
|
|
|
self.assertEqual(cm.exception.i, 2)
|
|
|
|
self.assertEqual(cm.exception.opcode, 5)
|
|
|
|
|
2023-02-11 16:24:48 -05:00
|
|
|
class LabelTest(unittest.TestCase):
|
|
|
|
def test_simple_loop(self):
|
|
|
|
p = Program()
|
|
|
|
p.parse_lines([
|
|
|
|
"add r0 10 0",
|
|
|
|
"add r1 20 0",
|
|
|
|
"CLB l0",
|
|
|
|
"add r0 r0 -1",
|
|
|
|
"add r1 r1 1",
|
2023-02-12 13:06:08 -05:00
|
|
|
"jl l0 0 r0"
|
2023-02-11 16:24:48 -05:00
|
|
|
])
|
|
|
|
ex = ffi.Environment(p())
|
|
|
|
self.assertEqual(ex(), ffi.RunRet.STOP)
|
|
|
|
self.assertEqual(ex.getreg(0), 0)
|
|
|
|
self.assertEqual(ex.getreg(1), 30)
|
|
|
|
|
2023-02-11 12:11:32 -05:00
|
|
|
class ProgramTest(unittest.TestCase):
|
|
|
|
def test_exec_simple_reg(self):
|
|
|
|
p = Program()
|
|
|
|
p.parse_asm_line("push 5")
|
|
|
|
p.parse_asm_line("push 6")
|
|
|
|
p.parse_asm_line("pop r0")
|
|
|
|
p.parse_asm_line("pop r1")
|
|
|
|
ex = ffi.Environment()
|
|
|
|
self.assertEqual(ex.load(p()), ffi.CompileRet.OK)
|
|
|
|
self.assertEqual(ex(), ffi.RunRet.STOP)
|
2023-02-11 15:49:39 -05:00
|
|
|
self.assertEqual(ex.getreg(0), 6)
|
|
|
|
self.assertEqual(ex.getreg(1), 5)
|
2023-02-11 12:11:32 -05:00
|
|
|
|
2023-02-07 12:25:52 -05:00
|
|
|
if __name__ == "__main__":
|
|
|
|
unittest.main()
|