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authorGravatar Peter McGoron 2022-07-21 13:51:55 -0400
committerGravatar Peter McGoron 2022-07-21 13:52:51 -0400
commit34bb170241e1c2643cc8b6f3d5a2fee59d1226f2 (patch)
treeeea9ee1ec48e60084eabcb2d31b2b29aedf6b07f /spi_master.v
parentautogenerate mode tests (diff)
add read only master with tests
Diffstat (limited to 'spi_master.v')
-rw-r--r--spi_master.v17
1 files changed, 16 insertions, 1 deletions
diff --git a/spi_master.v b/spi_master.v
index b8a3439..cc5f01d 100644
--- a/spi_master.v
+++ b/spi_master.v
@@ -3,7 +3,18 @@
* License, v.2.0. If a copy of the MPL was not distributed with this
* file, You can obtain one at https://mozilla.org/MPL/2.0/.
*/
-module spi_master
+
+module
+`ifdef SPI_MASTER_NO_READ
+spi_master_no_read
+`else
+`ifdef SPI_MASTER_NO_WRITE
+spi_master_no_write
+`else
+spi_master
+`endif
+`endif
+
#(
parameter WID = 24, // Width of bits per transaction.
parameter WID_LEN = 5, // Length in bits required to store WID
@@ -78,11 +89,15 @@ task setup_bits();
* For mode 01 and mode 10, the first action is a WRITE.
*/
if (POLARITY == PHASE) begin
+`ifndef SPI_MASTER_NO_WRITE
mosi <= to_slave[WID-1];
send_buf <= to_slave << 1;
+`endif
state <= CYCLE_WAIT;
end else begin
+`ifndef SPI_MASTER_NO_WRITE
send_buf <= to_slave;
+`endif
state <= ON_CYCLE;
end
endtask