This website requires JavaScript.
Explore
Help
Sign In
Hardware
/
VexRiscv
mirror of
https://github.com/SpinalHDL/VexRiscv.git
Watch
1
Star
0
Fork
You've already forked VexRiscv
0
Code
Issues
Packages
Projects
Releases
Wiki
Activity
5243e46ffb
VexRiscv
/
scripts
/
regression
/
.gitignore
4 lines
35 B
Plaintext
Raw
Normal View
History
Unescape
Escape
better travis timings travis job naming reduce verilator cache size Fix dcache test timeout travis cleaning travis wip verilator wip fix java 10 compilation Travis wip travis rework
2019-04-20 07:59:39 -04:00
verilator*
Split machine os regression in two smaller parts
2019-04-21 14:30:58 -04:00
verilator
better travis timings travis job naming reduce verilator cache size Fix dcache test timeout travis cleaning travis wip verilator wip fix java 10 compilation Travis wip travis rework
2019-04-20 07:59:39 -04:00
!verilator.mk