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VexRiscv
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SpinalHDL 1.1.0

This commit is contained in:
Dolu1990 2017-12-28 13:49:20 +01:00
parent a4db278655
commit 0d39e38906
2 changed files with 3 additions and 3 deletions
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4
build.sbt
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@ -9,8 +9,8 @@ scalaVersion := "2.11.6"
EclipseKeys.withSource := true EclipseKeys.withSource := true
libraryDependencies ++= Seq( libraryDependencies ++= Seq(
"com.github.spinalhdl" % "spinalhdl-core_2.11" % "1.0.5", "com.github.spinalhdl" % "spinalhdl-core_2.11" % "1.1.0",
"com.github.spinalhdl" % "spinalhdl-lib_2.11" % "1.0.5", "com.github.spinalhdl" % "spinalhdl-lib_2.11" % "1.1.0",
"org.yaml" % "snakeyaml" % "1.8" "org.yaml" % "snakeyaml" % "1.8"
) )

2
src/test/scala/vexriscv/MuraxSim.scala
View File

@ -17,7 +17,7 @@ object MuraxSim {
// def config = MuraxConfig.default.copy(onChipRamSize = 256 kB) // def config = MuraxConfig.default.copy(onChipRamSize = 256 kB)
def config = MuraxConfig.default.copy(onChipRamSize = 4 kB, onChipRamHexFile = "src/main/ressource/hex/muraxDemo.hex") def config = MuraxConfig.default.copy(onChipRamSize = 4 kB, onChipRamHexFile = "src/main/ressource/hex/muraxDemo.hex")
SimConfig(new Murax(config)).allOptimisation.doManagedSim{dut => SimConfig.allOptimisation.compile(new Murax(config)).doSim{dut =>
val mainClkPeriod = (1e12/dut.config.coreFrequency.toDouble).toLong val mainClkPeriod = (1e12/dut.config.coreFrequency.toDouble).toLong
val jtagClkPeriod = mainClkPeriod*4 val jtagClkPeriod = mainClkPeriod*4
val uartBaudRate = 115200 val uartBaudRate = 115200