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CfuPlugin.withEnable added

This commit is contained in:
Dolu1990 2022-06-09 17:57:24 +02:00
parent 1ce4c6e493
commit 1303c0ca7c
1 changed files with 5 additions and 4 deletions
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9
src/main/scala/vexriscv/plugin/CfuPlugin.scala
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@ -101,7 +101,8 @@ class CfuPlugin(val stageCount : Int,
val busParameter : CfuBusParameter, val busParameter : CfuBusParameter,
val encodings : List[CfuPluginEncoding] = null, val encodings : List[CfuPluginEncoding] = null,
val stateAndIndexCsrOffset : Int = 0xBC0, val stateAndIndexCsrOffset : Int = 0xBC0,
val statusCsrOffset : Int = 0x801) extends Plugin[VexRiscv]{ val statusCsrOffset : Int = 0x801,
val withEnable : Boolean = true) extends Plugin[VexRiscv]{
def p = busParameter def p = busParameter
assert(p.CFU_INPUTS <= 2) assert(p.CFU_INPUTS <= 2)
@ -158,8 +159,8 @@ class CfuPlugin(val stageCount : Int,
val csr = pipeline plug new Area{ val csr = pipeline plug new Area{
val factory = pipeline.service(classOf[CsrInterface]) val factory = pipeline.service(classOf[CsrInterface])
val en = Reg(Bool()) init(False) val en = withEnable generate (Reg(Bool()) init(False))
factory.rw(stateAndIndexCsrOffset, 31, en) if(withEnable) factory.rw(stateAndIndexCsrOffset, 31, en)
val stateId = Reg(UInt(log2Up(p.CFU_STATE_INDEX_NUM) bits)) init(0) val stateId = Reg(UInt(log2Up(p.CFU_STATE_INDEX_NUM) bits)) init(0)
if(p.CFU_STATE_INDEX_NUM > 1) { if(p.CFU_STATE_INDEX_NUM > 1) {
@ -181,7 +182,7 @@ class CfuPlugin(val stageCount : Int,
} }
} }
when(decode.input(CFU_ENABLE) && !csr.en){ if(withEnable) when(decode.input(CFU_ENABLE) && !csr.en){
pipeline.service(classOf[DecoderService]).forceIllegal() pipeline.service(classOf[DecoderService]).forceIllegal()
} }