Fix d$ uncached writes exception handeling
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@ -983,7 +983,7 @@ class DataCache(val p : DataCacheConfig, mmuParameter : MemoryTranslatorBusParam
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when(bypassCache){
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io.cpu.writeBack.data := ioMemRspMuxed
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if(catchAccessError) io.cpu.writeBack.accessError := io.mem.rsp.valid && io.mem.rsp.error
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if(catchAccessError) io.cpu.writeBack.accessError := !request.wr && pending.last && io.mem.rsp.valid && io.mem.rsp.error
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} otherwise {
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io.cpu.writeBack.data := dataMux
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if(catchAccessError) io.cpu.writeBack.accessError := (waysHits & B(tagsReadRsp.map(_.error))) =/= 0
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