debugging Murax SoC without Jtag Adapter

This commit is contained in:
Pradeep2004 2021-04-30 22:37:26 +02:00 committed by GitHub
parent d15f358b44
commit 334df7010c
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 1 additions and 1 deletions

2
Readme
View File

@ -67,7 +67,7 @@ you can take it from https://github.com/SpinalHDL/SaxonSoc/blob/dev-0.3/bsp/digi
https://github.com/SpinalHDL/SaxonSoc/blob/dev-0.3/bsp/digilent/ArtyA7SmpLinux/openocd/soc_init.cfg https://github.com/SpinalHDL/SaxonSoc/blob/dev-0.3/bsp/digilent/ArtyA7SmpLinux/openocd/soc_init.cfg
You can take it but you need to : set cpu_count to 1 and remove Line 22 to 35. You can take it but you need to : set cpu_count to 1 and remove Line 22 to 35.
• Then, after openocd is running, in new terminal, follow the below commands in VexriscvSocSoftware folder ( https://github.com/SpinalHDL/VexRiscvSocSoftware ). • Then, after openocd is running, in new terminal, follow the below commands in VexriscvSocSoftware folder ( https://github.com/SpinalHDL/VexRiscvSocSoftware )
• Go to the path VexRiscvSocSoftware/projects/murax/demo/build and then give the below commands : • Go to the path VexRiscvSocSoftware/projects/murax/demo/build and then give the below commands :