Fix fpu csr access on fs===0 now also trap

src/main/scala/vexriscv/plugin/FpuPlugin.scala

@@ -229,14 +229,16 @@ class FpuPlugin(externalFpu : Boolean = false,
       service.r(CSR.SSTATUS, 31, sd)
       service.r(CSR.MSTATUS, 31, sd)
 
-      when(fs === 0) {
+      val accessFpuCsr = False
       for (csr <- List(CSR.FRM, CSR.FCSR, CSR.FFLAGS)) {
         service.during(csr) {
+          accessFpuCsr := True
+        }
+      }
+      when(accessFpuCsr && fs === 0) {
         service.forceFailCsr()
       }
     }
-      }
-    }
 
     decode plug new Area{
       import decode._