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Fix cpu sending instruction memory request while being halted by the DebugPlugin
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parent
43253f61c1
commit
3b66d986a8
4 changed files with 7 additions and 8 deletions
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@ -187,7 +187,7 @@ class DebugPlugin(val debugClockDomain : ClockDomain) extends Plugin[VexRiscv] {
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}
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when(haltIt) {
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prefetch.arbitration.haltIt := True
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prefetch.arbitration.haltItByOther := True
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}
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when(stepIt && prefetch.arbitration.isFiring) {
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@ -6,9 +6,8 @@ import spinal.lib._
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import scala.collection.mutable.ArrayBuffer
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class PcManagerSimplePlugin(resetVector : BigInt, fastPcCalculation : Boolean = false) extends Plugin[VexRiscv] with JumpService{
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class PcManagerSimplePlugin(resetVector : BigInt,
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fastPcCalculation : Boolean = false) extends Plugin[VexRiscv] with JumpService{
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//FetchService interface
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case class JumpInfo(interface : Flow[UInt], stage: Stage)
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val jumpInfos = ArrayBuffer[JumpInfo]()
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@ -10,6 +10,6 @@ class SingleInstructionLimiterPlugin() extends Plugin[VexRiscv] {
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import pipeline._
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import pipeline.config._
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prefetch.arbitration.haltIt.setWhen(List(fetch,decode,execute,memory,writeBack).map(_.arbitration.isValid).orR)
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prefetch.arbitration.haltItByOther.setWhen(List(fetch,decode,execute,memory,writeBack).map(_.arbitration.isValid).orR)
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}
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}
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@ -1,10 +1,10 @@
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[*]
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[*] GTKWave Analyzer v3.3.58 (w)1999-2014 BSI
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[*] Sat Jul 29 00:24:49 2017
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[*] Sat Jul 29 10:39:29 2017
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[*]
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[dumpfile] "/home/spinalvm/Spinal/VexRiscv/src/test/cpp/murax/Murax.vcd"
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[dumpfile_mtime] "Sat Jul 29 00:24:44 2017"
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[dumpfile_size] 177335125
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[dumpfile_mtime] "Sat Jul 29 10:39:12 2017"
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[dumpfile_size] 230220943
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[savefile] "/home/spinalvm/Spinal/VexRiscv/src/test/cpp/murax/murax.gtkw"
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[timestart] 56764536000
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[size] 1776 953
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