goldenmodel now pass more machine mode CSR tests
This commit is contained in:
Dolu1990
parent
ee402ec5dc
commit
3c66f7c58a
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@ -192,7 +192,7 @@ class success : public std::exception { };
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class RiscvGolden {
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public:
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int32_t pc;
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int32_t pc, lastPc;
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int32_t regs[32];
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union status {
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@ -273,7 +273,7 @@ public:
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status.raw = 0;
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mip.raw = 0;
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mie.raw = 0;
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mtvec.raw = 0;
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mtvec.raw = 0x80000020;
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mcause.raw = 0;
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mbadaddr = 0;
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mepc = 0;
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@ -286,7 +286,12 @@ public:
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}
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virtual void pcWrite(int32_t target) {
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if(isPcAligned(target)){
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lastPc = pc;
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pc = target;
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} else {
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exception(0, 0);
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}
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}
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uint32_t mbadaddr;
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uint32_t mepc;
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@ -305,6 +310,11 @@ public:
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if(interrupt) livenessInterrupt = 0;
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//status.MPP := privilege
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if(!interrupt) step(); //As VexRiscv instruction which trap do not reach writeback stage fire
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}
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void ilegalInstruction(){
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exception(0, 2);
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}
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virtual void fail() {
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@ -361,6 +371,15 @@ public:
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}
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bool isPcAligned(uint32_t pc){
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#ifdef COMPRESSED
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return (pc & 1) == 0;
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#else
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return (pc & 3) == 0;
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#endif
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}
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virtual void step() {
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livenessStep = 0;
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@ -393,15 +412,24 @@ public:
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uint32_t i;
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uint32_t u32Buf;
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if (pc & 2) {
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iRead(pc - 2, &i);
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if(iRead(pc - 2, &i)){
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exception(0, 1);
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return;
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}
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i >>= 16;
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if (i & 3 == 3) {
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uint32_t u32Buf;
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iRead(pc + 2, &u32Buf);
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if(iRead(pc + 2, &u32Buf)){
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exception(0, 1);
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return;
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}
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i |= u32Buf << 16;
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}
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} else {
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iRead(pc, &i);
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if(iRead(pc, &i)){
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exception(0, 1);
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return;
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}
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}
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if ((i & 0x3) == 0x3) {
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//32 bit
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@ -411,7 +439,7 @@ public:
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case 0x6F:rfWrite(rd32, pc + 4);pcWrite(pc + (iBits(21, 10) << 1) + (iBits(20, 1) << 11) + (iBits(12, 8) << 12) + (iSign() << 20));break; //JAL
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case 0x67:{
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uint32_t target = (i32_rs1 + i32_i_imm) & ~1;
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rfWrite(rd32, pc + 4);
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if(isPcAligned(target)) rfWrite(rd32, pc + 4);
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pcWrite(target);
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} break; //JALR
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case 0x63:
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@ -424,9 +452,16 @@ public:
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case 0x7:if (uint32_t(i32_rs1) >= uint32_t(i32_rs2))pcWrite(pc + i32_sb_imm); else pcWrite(pc + 4);break;
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}
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break;
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case 0x03: //LOADS
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case 0x03:{ //LOADS
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uint32_t data;
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dRead(i32_rs1 + i32_i_imm, 1 << ((i >> 12) & 0x3), &data);
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uint32_t address = i32_rs1 + i32_i_imm;
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uint32_t size = 1 << ((i >> 12) & 0x3);
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if(address & (size-1)){
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exception(0, 4);
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} else {
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if(dRead(address, size, &data)){
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exception(0, 5);
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} else {
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switch ((i >> 12) & 0x7) {
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case 0x0:rfWrite(rd32, int8_t(data));pcWrite(pc + 4);break;
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case 0x1:rfWrite(rd32, int16_t(data));pcWrite(pc + 4);break;
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@ -434,14 +469,19 @@ public:
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case 0x4:rfWrite(rd32, uint8_t(data));pcWrite(pc + 4);break;
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case 0x5:rfWrite(rd32, uint16_t(data));pcWrite(pc + 4);break;
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}
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break;
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case 0x23: //STORE
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switch ((i >> 12) & 0x7) {
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case 0x0:dWrite(i32_rs1 + i32_s_imm, 1, i32_rs2);pcWrite(pc + 4);break;
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case 0x1:dWrite(i32_rs1 + i32_s_imm, 2, i32_rs2);pcWrite(pc + 4);break;
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case 0x2:dWrite(i32_rs1 + i32_s_imm, 4, i32_rs2);pcWrite(pc + 4);break;
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}
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break;
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}
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}break;
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case 0x23: { //STORE
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uint32_t address = i32_rs1 + i32_s_imm;
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uint32_t size = 1 << ((i >> 12) & 0x3);
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if(address & (size-1)){
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exception(0, 6);
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} else {
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dWrite(address, size, i32_rs2);
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pcWrite(pc + 4);
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}
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}break;
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case 0x13: //ALUi
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switch ((i >> 12) & 0x7) {
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case 0x0:rfWrite(rd32, i32_rs1 + i32_i_imm);pcWrite(pc + 4);break;
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@ -500,13 +540,21 @@ public:
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break;
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case 0x73:{
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if(i32_func3 == 0){
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switch(i){
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case 0x30200073:{ //MRET
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status.mie = status.mpie;
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//privilege := mstatus.MPP
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pcWrite(mepc);
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}break;
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case 0x00000073:{ //ECALL
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exception(0, 11);
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}break;
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case 0x10500073:{ //WFI
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pcWrite(pc + 4);
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}break;
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default:
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ilegalInstruction();
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break;
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}
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} else {
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//CSR
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@ -533,11 +581,26 @@ public:
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case 0: rfWrite(i16_addr2, rf_sp + i16_addi4spn_imm); pcWrite(pc + 2); break;
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case 2: {
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uint32_t data;
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dRead(i16_rf1 + i16_lw_imm, 4, &data);
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uint32_t address = i16_rf1 + i16_lw_imm;
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if(address & 0x3){
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exception(0, 4);
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} else {
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if(dRead(i16_rf1 + i16_lw_imm, 4, &data)) {
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exception(1, 5);
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} else {
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rfWrite(i16_addr2, data); pcWrite(pc + 2);
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break;
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}
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case 6: dWrite(i16_rf1 + i16_lw_imm, 4, i16_rf2); pcWrite(pc + 2); break;
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}
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} break;
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case 6: {
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uint32_t address = i16_rf1 + i16_lw_imm;
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if(address & 0x3){
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exception(0, 6);
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} else {
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dWrite(address, 4, i16_rf2);
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pcWrite(pc + 2);
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}
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}break;
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case 8: rfWrite(rd32, regs[rd32] + i16_imm); pcWrite(pc + 2); break;
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case 9: rfWrite(1, pc + 2);pcWrite(pc + i16_j_imm); break;
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case 10: rfWrite(rd32, i16_imm);pcWrite(pc + 2); break;
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@ -565,9 +628,17 @@ public:
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case 16: rfWrite(rd32, regs[rd32] << i16_zimm); pcWrite(pc + 2); break;
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case 18:{
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uint32_t data;
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dRead(rf_sp + i16_lwsp_imm, 4, &data);
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rfWrite(rd32, data); pcWrite(pc + 2); break;
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uint32_t address = rf_sp + i16_lwsp_imm;
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if(address & 0x3){
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exception(0, 4);
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} else {
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if(dRead(address, 4, &data)){
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exception(1, 5);
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} else {
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rfWrite(rd32, data); pcWrite(pc + 2);
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}
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}
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}break;
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case 20:
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if(i & 0x1000){
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if(iBits(2,10) == 0){
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@ -585,7 +656,14 @@ public:
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}
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}
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break;
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case 22: dWrite(rf_sp + i16_swsp_imm, 4, regs[iBits(2,5)]); pcWrite(pc + 2); break;
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case 22: {
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uint32_t address = rf_sp + i16_swsp_imm;
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if(address & 3){
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exception(0,6);
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} else {
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dWrite(address, 4, regs[iBits(2,5)]); pcWrite(pc + 2);
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}
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}break;
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}
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}
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}
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@ -681,9 +759,9 @@ public:
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virtual bool iRead(int32_t address, uint32_t *data){
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mem.read(address, 4, (uint8_t*)data);
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bool error;
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ws->iBusAccessPatch(address,data,&error);
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ws->iBusAccess(address, data, &error);
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// ws->iBusAccessPatch(address,data,&error);
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return error;
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}
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@ -700,6 +778,7 @@ public:
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}
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*data = t.data;
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periphRead.pop();
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return t.error;
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}else {
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mem.read(address, size, (uint8_t*)data);
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}
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@ -1032,11 +1111,6 @@ public:
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}
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#endif
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if(top->VexRiscv->writeBack_arbitration_isFiring){
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if(riscvRefEnable && top->VexRiscv->writeBack_PC != riscvRef.pc){
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cout << " pc missmatch " << top->VexRiscv->writeBack_PC << " should be " << riscvRef.pc << endl;
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fail();
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}
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if(riscvRefEnable) {
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riscvRef.step();
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bool mIntTimer = false;
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@ -1053,6 +1127,10 @@ public:
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riscvRef.liveness(mIntTimer, mIntExt);
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}
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if(riscvRefEnable && top->VexRiscv->writeBack_PC != riscvRef.lastPc){
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cout << hex << " pc missmatch " << top->VexRiscv->writeBack_PC << " should be " << riscvRef.lastPc << dec << endl;
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fail();
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}
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bool rfWriteValid = false;
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@ -2687,6 +2765,7 @@ int main(int argc, char **argv, char **env) {
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printf("BOOT\n");
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timespec startedAt = timer_start();
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for(int idx = 0;idx < 1;idx++){
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#if defined(DEBUG_PLUGIN_EXTERNAL) || defined(RUN_HEX)
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