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initialize the clint in sim

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Dolu1990 2020-04-18 01:26:31 +02:00
parent befecc7ed6
commit 4a49e6d91f
1 changed files with 5 additions and 1 deletions
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6
src/main/scala/vexriscv/demo/smp/VexRiscvSmpCluster.scala
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@ -388,6 +388,10 @@ object VexRiscvSmpClusterTestInfrastructure{
onWrite(PUTC)(data => print(data.toChar)) onWrite(PUTC)(data => print(data.toChar))
// onWrite(GETC)(data => System.in.read().toInt) // onWrite(GETC)(data => System.in.read().toInt)
dut.io.softwareInterrupts #= 0
dut.io.timerInterrupts #= 0
dut.io.externalInterrupts #= 0
dut.io.externalSupervisorInterrupts #= 0
onRead(CLINT_TIME_ADDR)(simTime().toInt) onRead(CLINT_TIME_ADDR)(simTime().toInt)
onRead(CLINT_TIME_ADDR+4)((simTime() >> 32).toInt) onRead(CLINT_TIME_ADDR+4)((simTime() >> 32).toInt)
for(hartId <- 0 until cpuCount){ for(hartId <- 0 until cpuCount){
@ -458,7 +462,7 @@ object VexRiscvSmpClusterOpenSbi extends App{
simConfig.allOptimisation simConfig.allOptimisation
simConfig.addSimulatorFlag("--threads 1") simConfig.addSimulatorFlag("--threads 1")
val cpuCount = 4 val cpuCount = 16
val withStall = false val withStall = false
simConfig.compile(VexRiscvSmpClusterGen.vexRiscvCluster(cpuCount)).doSimUntilVoid(seed = 42){dut => simConfig.compile(VexRiscvSmpClusterGen.vexRiscvCluster(cpuCount)).doSimUntilVoid(seed = 42){dut =>