Fix custom_csr regression against random ibus stall
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Dolu1990
parent
d2e5755df4
commit
4ee2482cbf
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@ -9,36 +9,34 @@ Disassembly of section .crt_section:
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4: b04020f3 csrr ra,mhpmcounter4
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8: b0402173 csrr sp,mhpmcounter4
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c: b04021f3 csrr gp,mhpmcounter4
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10: 00208093 addi ra,ra,2
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14: 00110113 addi sp,sp,1
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18: 02309e63 bne ra,gp,54 <fail>
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1c: 02311c63 bne sp,gp,54 <fail>
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20: 00200e13 li t3,2
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24: 005dc0b7 lui ra,0x5dc
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28: 98a08093 addi ra,ra,-1654 # 5db98a <pass+0x5db92a>
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2c: b0409073 csrw mhpmcounter4,ra
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30: b0402173 csrr sp,mhpmcounter4
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34: 02209063 bne ra,sp,54 <fail>
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38: 00300e13 li t3,3
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3c: b05020f3 csrr ra,mhpmcounter5
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40: b0502173 csrr sp,mhpmcounter5
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44: b05021f3 csrr gp,mhpmcounter5
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48: 0020d663 ble sp,ra,54 <fail>
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4c: 00315463 ble gp,sp,54 <fail>
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50: 0100006f j 60 <pass>
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10: 02114e63 blt sp,ra,4c <fail>
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14: 0221cc63 blt gp,sp,4c <fail>
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18: 00200e13 li t3,2
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1c: 005dc0b7 lui ra,0x5dc
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20: 98a08093 addi ra,ra,-1654 # 5db98a <pass+0x5db932>
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24: b0409073 csrw mhpmcounter4,ra
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28: b0402173 csrr sp,mhpmcounter4
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2c: 02114063 blt sp,ra,4c <fail>
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30: 00300e13 li t3,3
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34: b05020f3 csrr ra,mhpmcounter5
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38: b0502173 csrr sp,mhpmcounter5
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3c: b05021f3 csrr gp,mhpmcounter5
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40: 0020d663 ble sp,ra,4c <fail>
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44: 00315463 ble gp,sp,4c <fail>
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48: 0100006f j 58 <pass>
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00000054 <fail>:
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54: f0100137 lui sp,0xf0100
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58: f2410113 addi sp,sp,-220 # f00fff24 <pass+0xf00ffec4>
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5c: 01c12023 sw t3,0(sp)
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0000004c <fail>:
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4c: f0100137 lui sp,0xf0100
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50: f2410113 addi sp,sp,-220 # f00fff24 <pass+0xf00ffecc>
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54: 01c12023 sw t3,0(sp)
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00000060 <pass>:
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60: f0100137 lui sp,0xf0100
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64: f2010113 addi sp,sp,-224 # f00fff20 <pass+0xf00ffec0>
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68: 00012023 sw zero,0(sp)
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00000058 <pass>:
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58: f0100137 lui sp,0xf0100
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5c: f2010113 addi sp,sp,-224 # f00fff20 <pass+0xf00ffec8>
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60: 00012023 sw zero,0(sp)
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64: 00000013 nop
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68: 00000013 nop
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6c: 00000013 nop
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70: 00000013 nop
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74: 00000013 nop
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78: 00000013 nop
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7c: 00000013 nop
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80: 00000013 nop
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Binary file not shown.
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@ -1,10 +1,9 @@
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:10000000130E1000F32040B0732140B0F32140B034
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:100010009380200013011100639E3002631C3102A3
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:10002000130E2000B7C05D009380A098739040B07D
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:10003000732140B063902002130E3000F32050B0C3
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:10004000732150B0F32150B063D6200063543100C7
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:100050006F000001370110F0130141F22320C101AC
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:10006000370110F0130101F22320010013000000FA
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:100070001300000013000000130000001300000034
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:040080001300000069
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:10001000634E110263CC2102130E2000B7C05D00B5
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:100020009380A098739040B0732140B06340110258
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:10003000130E3000F32050B0732150B0F32150B0B4
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:1000400063D62000635431006F000001370110F0C7
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:10005000130141F22320C101370110F0130101F215
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:100060002320010013000000130000001300000013
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:0C0070001300000013000000130000004B
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:00000001FF
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@ -16,15 +16,15 @@ END GROUP
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LOAD /opt/riscv/bin/../lib/gcc/riscv64-unknown-elf/7.1.1/rv32i/ilp32/libgcc.a
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0x0000000000000000 . = 0x0
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.crt_section 0x0000000000000000 0x84
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.crt_section 0x0000000000000000 0x7c
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0x0000000000000000 . = ALIGN (0x4)
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*crt.o(.text)
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.text 0x0000000000000000 0x84 build/src/crt.o
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.text 0x0000000000000000 0x7c build/src/crt.o
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0x0000000000000000 _start
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OUTPUT(build/custom_csr.elf elf32-littleriscv)
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.data 0x0000000000000084 0x0
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.data 0x0000000000000084 0x0 build/src/crt.o
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.data 0x000000000000007c 0x0
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.data 0x000000000000007c 0x0 build/src/crt.o
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.bss 0x0000000000000084 0x0
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.bss 0x0000000000000084 0x0 build/src/crt.o
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.bss 0x000000000000007c 0x0
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.bss 0x000000000000007c 0x0 build/src/crt.o
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@ -1,10 +1,9 @@
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@00000000
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13 0E 10 00 F3 20 40 B0 73 21 40 B0 F3 21 40 B0
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93 80 20 00 13 01 11 00 63 9E 30 02 63 1C 31 02
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13 0E 20 00 B7 C0 5D 00 93 80 A0 98 73 90 40 B0
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73 21 40 B0 63 90 20 02 13 0E 30 00 F3 20 50 B0
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73 21 50 B0 F3 21 50 B0 63 D6 20 00 63 54 31 00
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6F 00 00 01 37 01 10 F0 13 01 41 F2 23 20 C1 01
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37 01 10 F0 13 01 01 F2 23 20 01 00 13 00 00 00
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13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00
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13 00 00 00
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63 4E 11 02 63 CC 21 02 13 0E 20 00 B7 C0 5D 00
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93 80 A0 98 73 90 40 B0 73 21 40 B0 63 40 11 02
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13 0E 30 00 F3 20 50 B0 73 21 50 B0 F3 21 50 B0
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63 D6 20 00 63 54 31 00 6F 00 00 01 37 01 10 F0
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13 01 41 F2 23 20 C1 01 37 01 10 F0 13 01 01 F2
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23 20 01 00 13 00 00 00 13 00 00 00 13 00 00 00
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13 00 00 00 13 00 00 00 13 00 00 00
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@ -6,10 +6,8 @@ _start:
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csrr x1, 0xB04
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csrr x2, 0xB04
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csrr x3, 0xB04
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add x1, x1, 2
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add x2, x2, 1
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bne x1, x3, fail
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bne x2, x3, fail
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blt x2, x1, fail
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blt x3, x2, fail
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//Test 2
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@ -17,7 +15,7 @@ _start:
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li x1, 6142346
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csrw 0xB04, x1
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csrr x2, 0xB04
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bne x1, x2, fail
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blt x2, x1, fail
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//Test 3
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