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VexRiscv
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This commit is contained in:
Dolu1990 2018-05-27 23:33:57 +02:00
parent 346338f084
commit 5704f22739
2 changed files with 2 additions and 2 deletions
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2
src/main/scala/vexriscv/TestsWorkspace.scala
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@ -37,7 +37,7 @@ object TestsWorkspace {
prediction = DYNAMIC, prediction = DYNAMIC,
historyRamSizeLog2 = 8, historyRamSizeLog2 = 8,
catchAccessFault = true, catchAccessFault = true,
compressedGen = false compressedGen = true
), ),
// new IBusCachedPlugin( // new IBusCachedPlugin(
// resetVector = 0x80000000l, // resetVector = 0x80000000l,

2
src/main/scala/vexriscv/plugin/Fetcher.scala
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@ -488,7 +488,7 @@ abstract class IBusFetcherImpl(val catchAccessFault : Boolean,
historyWrite.valid := False historyWrite.valid := False
historyWrite.address := (branchStage.input(PC) >> 2).resized historyWrite.address := branchStage.input(PC)(2, historyRamSizeLog2 bits)
historyWrite.data.source := branchStage.input(PC).asBits >> 1 + historyRamSizeLog2 historyWrite.data.source := branchStage.input(PC).asBits >> 1 + historyRamSizeLog2
historyWrite.data.target := fetchPrediction.rsp.finalPc historyWrite.data.target := fetchPrediction.rsp.finalPc