Hardware/VexRiscv
1
0
Fork 0
mirror of https://github.com/SpinalHDL/VexRiscv.git synced 2025-01-03 03:43:39 -05:00
Code Issues Projects Releases Packages Wiki Activity

restore avalon d$ tests

Browse source
This commit is contained in:
Dolu1990 2021-09-02 15:42:33 +02:00
parent cc9f3e753a
commit 68e704f309
1 changed files with 4 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
src/test/cpp/regression/main.cpp
View file

@ -2747,8 +2747,10 @@ public:
virtual void preCycle(){ virtual void preCycle(){
if ((top->dBusAvalon_read || top->dBusAvalon_write) && top->dBusAvalon_waitRequestn) { if ((top->dBusAvalon_read || top->dBusAvalon_write) && top->dBusAvalon_waitRequestn) {
if(top->dBusAvalon_write){ if(top->dBusAvalon_write){
uint32_t size = __builtin_popcount(top->dBusAvalon_byteEnable);
uint32_t offset = ffs(top->dBusAvalon_byteEnable)-1;
bool error_next = false; bool error_next = false;
ws->dBusAccess(top->dBusAvalon_address + beatCounter * 4,1,2,top->dBusAvalon_byteEnable,&top->dBusAvalon_writeData,&error_next); ws->dBusAccess(top->dBusAvalon_address + beatCounter * 4 + offset,1,size,((uint8_t*)&top->dBusAvalon_writeData)+offset,&error_next);
beatCounter++; beatCounter++;
if(beatCounter == top->dBusAvalon_burstCount){ if(beatCounter == top->dBusAvalon_burstCount){
beatCounter = 0; beatCounter = 0;
@ -2756,7 +2758,7 @@ public:
} else { } else {
for(int beat = 0;beat < top->dBusAvalon_burstCount;beat++){ for(int beat = 0;beat < top->dBusAvalon_burstCount;beat++){
DBusCachedAvalonTask rsp; DBusCachedAvalonTask rsp;
ws->dBusAccess(top->dBusAvalon_address + beat * 4,0,2,0,&rsp.data,&rsp.error); ws->dBusAccess(top->dBusAvalon_address + beat * 4 ,0,4,((uint8_t*)&rsp.data),&rsp.error);
rsps.push(rsp); rsps.push(rsp);
} }
} }