cleaning
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001ca45c57
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@ -290,12 +290,10 @@ class DBusSimplePlugin(catchAddressMisaligned : Boolean = false,
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val cmdSent = if(rspStage == execute) RegInit(False) setWhen(dBus.cmd.fire) clearWhen(!execute.arbitration.isStuck) else False
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val cmdSent = if(rspStage == execute) RegInit(False) setWhen(dBus.cmd.fire) clearWhen(!execute.arbitration.isStuck) else False
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insert(ALIGNEMENT_FAULT) := {
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if (catchAddressMisaligned)
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if (catchAddressMisaligned)
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(dBus.cmd.size === 2 && dBus.cmd.address(1 downto 0) =/= 0) || (dBus.cmd.size === 1 && dBus.cmd.address(0 downto 0) =/= 0)
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insert(ALIGNEMENT_FAULT) := (dBus.cmd.size === 2 && dBus.cmd.address(1 downto 0) =/= 0) || (dBus.cmd.size === 1 && dBus.cmd.address(0 downto 0) =/= 0)
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else
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else
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False
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insert(ALIGNEMENT_FAULT) := False
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}
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val skipCmd = False
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val skipCmd = False
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@ -321,6 +319,7 @@ class DBusSimplePlugin(catchAddressMisaligned : Boolean = false,
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U(1) -> B"0011",
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U(1) -> B"0011",
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default -> B"1111"
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default -> B"1111"
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) |<< dBus.cmd.address(1 downto 0)
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) |<< dBus.cmd.address(1 downto 0)
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insert(FORMAL_MEM_ADDR) := dBus.cmd.address & U"xFFFFFFFC"
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insert(FORMAL_MEM_ADDR) := dBus.cmd.address & U"xFFFFFFFC"
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insert(FORMAL_MEM_WMASK) := (dBus.cmd.valid && dBus.cmd.wr) ? formalMask | B"0000"
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insert(FORMAL_MEM_WMASK) := (dBus.cmd.valid && dBus.cmd.wr) ? formalMask | B"0000"
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insert(FORMAL_MEM_RMASK) := (dBus.cmd.valid && !dBus.cmd.wr) ? formalMask | B"0000"
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insert(FORMAL_MEM_RMASK) := (dBus.cmd.valid && !dBus.cmd.wr) ? formalMask | B"0000"
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