typo fix
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@ -198,10 +198,13 @@ You can find multiples software examples and demo there : https://github.com/Spi
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You can find some FPGA project which instantiate the Briey SoC there (DE1-SoC, DE0-Nano): https://drive.google.com/drive/folders/0B-CqLXDTaMbKZGdJZlZ5THAxRTQ?usp=sharing
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There is some measurements of Briey SoC timings and area :
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```
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Artix 7 -> 230 Mhz 3551 LUT 3612 FF
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Cyclone V -> 126 Mhz 2,608 ALMs
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Cyclone IV -> 117 Mhz 5,196 LUT 3,784 FF
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Cyclone II -> 102 Mhz 5,321 LUT 3,787 FF
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```
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## Build the RISC-V GCC
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