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VexRiscv
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comment debug code

This commit is contained in:
Dolu1990 2022-11-21 14:02:35 +01:00
parent 572ca3fcfa
commit a25ae96d33
1 changed files with 8 additions and 8 deletions
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16
src/main/scala/vexriscv/plugin/CsrPlugin.scala
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@ -1632,14 +1632,14 @@ class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with Excep
} }
} }
val csrs = (0x7A0 to 0x7A5) // val csrs = (0x7A0 to 0x7A5)
val miaouRead = csrs.map(v => isReading(v)).orR // val miaouRead = csrs.map(v => isReading(v)).orR
val miaouWrite = csrs.map(v => isWriting(v)).orR // val miaouWrite = csrs.map(v => isWriting(v)).orR
//
Component.toplevel.rework{ // Component.toplevel.rework{
out(CombInit(miaouRead.pull())).setName("debug0") // out(CombInit(miaouRead.pull())).setName("debug0")
out(CombInit(miaouWrite.pull())).setName("debug1") // out(CombInit(miaouWrite.pull())).setName("debug1")
} // }
} }
} }
} }