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readme ToC fix

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Dolu1990 2017-07-16 18:10:03 +02:00
parent cd2fb402c1
commit a38b137db2
1 changed files with 2 additions and 2 deletions
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@ -5,7 +5,7 @@
- [Dependencies](#dependencies) - [Dependencies](#dependencies)
- [CPU generation](#cpu-generation) - [CPU generation](#cpu-generation)
- [Regression tests](#regression-tests) - [Regression tests](#regression-tests)
- [Interactive debug of the simulated CPU via GDB, OpenOCD and Verilator sim](#interactive-debug-of-the-simulated-cpu-via-gdb--openocd-and-verilator-sim) - [Interactive debug of the simulated CPU via GDB OpenOCD and Verilator](#interactive-debug-of-the-simulated-cpu-via-gdb-openocd-and-verilator)
- [Using eclipse to run the software and debug it](#using-eclipse-to-run-the-software-and-debug-it) - [Using eclipse to run the software and debug it](#using-eclipse-to-run-the-software-and-debug-it)
- [Briey SoC](#briey-soc) - [Briey SoC](#briey-soc)
- [Build the RISC-V GCC](#build-the-risc-v-gcc) - [Build the RISC-V GCC](#build-the-risc-v-gcc)
@ -121,7 +121,7 @@ make clean run
make clean run IBUS=IBUS_SIMPLE DBUS=DBUS_SIMPLE CSR=no MMU=no DEBUG_PLUGIN=no MUL=no DIV=no make clean run IBUS=IBUS_SIMPLE DBUS=DBUS_SIMPLE CSR=no MMU=no DEBUG_PLUGIN=no MUL=no DIV=no
``` ```
## Interactive debug of the simulated CPU via GDB, OpenOCD and Verilator sim ## Interactive debug of the simulated CPU via GDB OpenOCD and Verilator
It's as described to run tests, but you just have to add DEBUG_PLUGIN_EXTERNAL=yes in the make arguments. It's as described to run tests, but you just have to add DEBUG_PLUGIN_EXTERNAL=yes in the make arguments.
Work for the GenFull, but not for the GenSmallest as this configuration has no debug module. Work for the GenFull, but not for the GenSmallest as this configuration has no debug module.