readme ToC fix
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- [Dependencies](#dependencies)
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- [CPU generation](#cpu-generation)
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- [Regression tests](#regression-tests)
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- [Interactive debug of the simulated CPU via GDB and OpenOCD (Verilator sim)](#interactive-debug-of-the-simulated-cpu-via-gdb-and-openocd--verilator-sim-)
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- [Interactive debug of the simulated CPU via GDB, OpenOCD and Verilator sim](#interactive-debug-of-the-simulated-cpu-via-gdb--openocd-and-verilator-sim)
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- [Using eclipse to run the software and debug it](#using-eclipse-to-run-the-software-and-debug-it)
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- [Briey SoC](#briey-soc)
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- [Build the RISC-V GCC](#build-the-risc-v-gcc)
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@ -121,7 +121,7 @@ make clean run
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make clean run IBUS=IBUS_SIMPLE DBUS=DBUS_SIMPLE CSR=no MMU=no DEBUG_PLUGIN=no MUL=no DIV=no
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```
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## Interactive debug of the simulated CPU via GDB and OpenOCD (Verilator sim)
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## Interactive debug of the simulated CPU via GDB, OpenOCD and Verilator sim
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It's as described to run tests, but you just have to add DEBUG_PLUGIN_EXTERNAL=yes in the make arguments.
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Work for the GenFull, but not for the GenSmallest as this configuration has no debug module.
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