Add dcache tests
This commit is contained in:
Charles Papon
parent
5a6665e57f
commit
aeb418a99e
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@ -0,0 +1,4 @@
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*.map
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*.v
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*.elf
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*.o
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@ -0,0 +1,79 @@
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build/dcache.elf: file format elf32-littleriscv
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Disassembly of section .crt_section:
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80000000 <_start>:
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80000000: 00000097 auipc ra,0x0
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80000004: 0b808093 addi ra,ra,184 # 800000b8 <fail>
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80000008: 30509073 csrw mtvec,ra
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8000000c <test1>:
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8000000c: 00100e13 li t3,1
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80000010: 00100093 li ra,1
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80000014: 00300113 li sp,3
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80000018: 00208093 addi ra,ra,2
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8000001c: 08209e63 bne ra,sp,800000b8 <fail>
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80000020 <test2>:
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80000020: 00200e13 li t3,2
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80000024: f56700b7 lui ra,0xf5670
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80000028: 900ff137 lui sp,0x900ff
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8000002c: 40000313 li t1,1024
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80000030 <test2_repeat>:
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80000030: 00100193 li gp,1
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80000034: 00200293 li t0,2
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80000038: 006303b3 add t2,t1,t1
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8000003c: 007181b3 add gp,gp,t2
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80000040: 007282b3 add t0,t0,t2
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80000044: 00312023 sw gp,0(sp) # 900ff000 <pass+0x100fef3c>
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80000048: 0000a023 sw zero,0(ra) # f5670000 <pass+0x7566ff3c>
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8000004c: 00012203 lw tp,0(sp)
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80000050: 06429463 bne t0,tp,800000b8 <fail>
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80000054: fff30313 addi t1,t1,-1
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80000058: 00408093 addi ra,ra,4
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8000005c: 00410113 addi sp,sp,4
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80000060: 0000500f 0x500f
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80000064: fc0316e3 bnez t1,80000030 <test2_repeat>
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80000068 <test3>:
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80000068: 00300e13 li t3,3
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8000006c: f56700b7 lui ra,0xf5670
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80000070: 900ff137 lui sp,0x900ff
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80000074: 40000313 li t1,1024
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80000078 <test3_repeat>:
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80000078: 00200193 li gp,2
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8000007c: 00300293 li t0,3
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80000080: 006303b3 add t2,t1,t1
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80000084: 007181b3 add gp,gp,t2
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80000088: 007282b3 add t0,t0,t2
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8000008c: 00012203 lw tp,0(sp) # 900ff000 <pass+0x100fef3c>
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80000090: 00312023 sw gp,0(sp)
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80000094: 0000a023 sw zero,0(ra) # f5670000 <pass+0x7566ff3c>
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80000098: 0000500f 0x500f
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8000009c: 00012203 lw tp,0(sp)
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800000a0: 00429c63 bne t0,tp,800000b8 <fail>
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800000a4: fff30313 addi t1,t1,-1
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800000a8: 00408093 addi ra,ra,4
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800000ac: 00410113 addi sp,sp,4
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800000b0: fc0314e3 bnez t1,80000078 <test3_repeat>
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800000b4: 0100006f j 800000c4 <pass>
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800000b8 <fail>:
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800000b8: f0100137 lui sp,0xf0100
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800000bc: f2410113 addi sp,sp,-220 # f00fff24 <pass+0x700ffe60>
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800000c0: 01c12023 sw t3,0(sp)
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800000c4 <pass>:
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800000c4: f0100137 lui sp,0xf0100
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800000c8: f2010113 addi sp,sp,-224 # f00fff20 <pass+0x700ffe5c>
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800000cc: 00012023 sw zero,0(sp)
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800000d0: 00000013 nop
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800000d4: 00000013 nop
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800000d8: 00000013 nop
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800000dc: 00000013 nop
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800000e0: 00000013 nop
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800000e4: 00000013 nop
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@ -0,0 +1,17 @@
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:0200000480007A
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:10000000970000009380800B73905030130E100007
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:10001000930010001301300093802000639E20089D
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:10002000130E2000B70067F537F10F90130300405F
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:100030009301100093022000B3036300B3817100A9
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:10004000B38272002320310023A0000003220100AC
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:10005000639442061303F3FF9380400013014100B1
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:100060000F500000E31603FC130E3000B70067F5D5
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:1000700037F10F90130300409301200093023000EA
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:10008000B3036300B3817100B382720003220100E5
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:100090002320310023A000000F50000003220100A4
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:1000A000639C42001303F3FF93804000130141005F
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:1000B000E31403FC6F000001370110F0130141F25B
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:1000C0002320C101370110F0130101F223200100A8
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:1000D00013000000130000001300000013000000D4
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:0800E0001300000013000000F2
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:00000001FF
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@ -0,0 +1,3 @@
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PROJ_NAME=dcache
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include ../common/asm.mk
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@ -0,0 +1,75 @@
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.globl _star
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#define TEST_ID x28
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_start:
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la x1, fail
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csrw mtvec, x1
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test1: //Dummy test
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li TEST_ID, 1
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li x1, 1
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li x2, 3
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addi x1, x1, 2
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bne x1, x2, fail
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test2: //No invalidate, without load => new one
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li TEST_ID, 2
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li x1, 0xF5670000
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li x2, 0x900FF000
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li x6, 4096/4
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test2_repeat:
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la x3, 1
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la x5, 2
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add x7, x6, x6
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add x3, x3, x7
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add x5, x5, x7
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sw x3, 0(x2)
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sw x0, 0(x1)
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lw x4, 0(x2)
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bne x5,x4, fail
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addi x6, x6, -1
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addi x1, x1, 4
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addi x2, x2, 4
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.word 0x000500F // dcache flush
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bnez x6, test2_repeat
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test3: //with invalidate, with preload
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li TEST_ID, 3
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li x1, 0xF5670000
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li x2, 0x900FF000
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li x6, 4096/4
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test3_repeat:
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la x3, 2
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la x5, 3
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add x7, x6, x6
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add x3, x3, x7
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add x5, x5, x7
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lw x4, 0(x2)
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sw x3, 0(x2)
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sw x0, 0(x1)
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.word 0x000500F // dcache flush
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lw x4, 0(x2)
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bne x5,x4, fail
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addi x6, x6, -1
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addi x1, x1, 4
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addi x2, x2, 4
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bnez x6, test3_repeat
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j pass
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fail:
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li x2, 0xF00FFF24
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sw TEST_ID, 0(x2)
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pass:
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li x2, 0xF00FFF20
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sw x0, 0(x2)
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nop
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nop
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nop
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nop
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nop
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nop
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@ -0,0 +1,16 @@
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OUTPUT_ARCH( "riscv" )
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MEMORY {
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onChipRam (W!RX)/*(RX)*/ : ORIGIN = 0x80000000, LENGTH = 128K
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}
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SECTIONS
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{
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.crt_section :
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{
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. = ALIGN(4);
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*crt.o(.text)
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} > onChipRam
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}
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@ -17,7 +17,7 @@ Disassembly of section .crt_section:
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8000001c: 02209c63 bne ra,sp,80000054 <fail>
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80000020 <test2>:
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80000020: 00100e13 li t3,1
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80000020: 00200e13 li t3,2
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80000024: 01300093 li ra,19
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80000028: 00000117 auipc sp,0x0
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8000002c: 02410113 addi sp,sp,36 # 8000004c <test2_trigger>
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@ -1,7 +1,7 @@
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:0200000480007A
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:10000000970000009380400573905030130E10004D
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:10001000930010001301300093802000639C2002A5
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:10002000130E10009300300117010000130141026C
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:10002000130E20009300300117010000130141025C
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:100030006F00000113000000130000001300000017
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:10004000232011000F1000006F0040006F0080009F
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:100050006F000001370110F0130141F22320C101AC
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@ -13,7 +13,7 @@ test1: //Dummy test
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bne x1, x2, fail
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test2:
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li TEST_ID, 1
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li TEST_ID, 2
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li x1, 0x13 //nop
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la x2, test2_trigger
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j test2_aligned
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@ -1676,6 +1676,15 @@ public:
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case 0xF00FFF48u: mTimeCmp = (mTimeCmp & 0xFFFFFFFF00000000) | *data;break;
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case 0xF00FFF4Cu: mTimeCmp = (mTimeCmp & 0x00000000FFFFFFFF) | (((uint64_t)*data) << 32); break;
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}
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if((addr & 0xFFFFF000) == 0xF5670000){
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uint32_t t = 0x900FF000 | (addr & 0xFFF);
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uint32_t old = (*mem.get(t + 3) << 24) | (*mem.get(t + 2) << 16) | (*mem.get(t + 1) << 8) | (*mem.get(t + 0) << 0);
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old++;
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*mem.get(t + 0) = old & 0xFF; old >>= 8;
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*mem.get(t + 1) = old & 0xFF; old >>= 8;
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*mem.get(t + 2) = old & 0xFF; old >>= 8;
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*mem.get(t + 3) = old & 0xFF; old >>= 8;
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}
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}else{
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switch(addr){
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case 0xF00FFF10u:
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@ -3562,6 +3571,9 @@ int main(int argc, char **argv, char **env) {
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#ifdef IBUS_CACHED
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redo(REDO,WorkspaceRegression("icache").withRiscvRef()->loadHex("../raw/icache/build/icache.hex")->bootAt(0x80000000u)->run(50e3););
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#endif
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#ifdef DBUS_CACHED
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redo(REDO,WorkspaceRegression("dcache").loadHex("../raw/dcache/build/dcache.hex")->bootAt(0x80000000u)->run(500e3););
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#endif
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#ifdef MMU
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redo(REDO,WorkspaceRegression("mmu").withRiscvRef()->loadHex("../raw/mmu/build/mmu.hex")->bootAt(0x80000000u)->run(50e3););
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