Add JTAG tunnel without TAP in EmbeddedRiscvJtag
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@ -14,6 +14,7 @@ import vexriscv._
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class EmbeddedRiscvJtag(var p : DebugTransportModuleParameter,
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var debugCd : ClockDomain = null,
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var jtagCd : ClockDomain = null,
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var withTap : Boolean = true,
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var withTunneling : Boolean = false
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) extends Plugin[VexRiscv] with VexRiscvRegressionArg{
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@ -61,7 +62,7 @@ class EmbeddedRiscvJtag(var p : DebugTransportModuleParameter,
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dm.io.ctrl <> logic.io.bus
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logic.io.jtag <> jtag
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}
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val dmiTunneled = if(withTap && withTunneling) new Area {
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val dmiTunneledWithTap = if(withTap && withTunneling) new Area {
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val logic = DebugTransportModuleJtagTapWithTunnel(
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p.copy(addressWidth = 7),
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debugCd = ClockDomain.current
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@ -69,6 +70,15 @@ class EmbeddedRiscvJtag(var p : DebugTransportModuleParameter,
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dm.io.ctrl <> logic.io.bus
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logic.io.jtag <> jtag
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}
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val dmiTunneledNoTap = if (!withTap && withTunneling) new Area {
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val logic = DebugTransportModuleTunneled(
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p.copy(addressWidth = 7),
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debugCd = ClockDomain.current,
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jtagCd = jtagCd
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)
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logic.io.instruction <> jtagInstruction
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dm.io.ctrl <> logic.io.bus
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}
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val privBus = pipeline.service(classOf[CsrPlugin]).debugBus.setAsDirectionLess()
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privBus <> dm.io.harts(0)
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