readme ToC fix

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Dolu1990 2017-07-16 18:08:39 +02:00
parent 3134725aa9
commit cd2fb402c1
1 changed files with 2 additions and 2 deletions

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@ -5,7 +5,7 @@
- [Dependencies](#dependencies)
- [CPU generation](#cpu-generation)
- [Regression tests](#regression-tests)
- [Interactive debug of the simulated CPU via GDB and OpenOCD (Verilator sim)](#interactive-debug-of-the-simulated-cpu-via-gdb-and-openocd--verilator-sim-)
- [Interactive debug of the simulated CPU via GDB, OpenOCD and Verilator sim](#interactive-debug-of-the-simulated-cpu-via-gdb--openocd-and-verilator-sim)
- [Using eclipse to run the software and debug it](#using-eclipse-to-run-the-software-and-debug-it)
- [Briey SoC](#briey-soc)
- [Build the RISC-V GCC](#build-the-risc-v-gcc)
@ -121,7 +121,7 @@ make clean run
make clean run IBUS=IBUS_SIMPLE DBUS=DBUS_SIMPLE CSR=no MMU=no DEBUG_PLUGIN=no MUL=no DIV=no
```
## Interactive debug of the simulated CPU via GDB and OpenOCD (Verilator sim)
## Interactive debug of the simulated CPU via GDB, OpenOCD and Verilator sim
It's as described to run tests, but you just have to add DEBUG_PLUGIN_EXTERNAL=yes in the make arguments.
Work for the GenFull, but not for the GenSmallest as this configuration has no debug module.