Fix incorrect comment
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@ -15,7 +15,7 @@ trap_entry:
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csrr x29, mstatus
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and x29, x29, 0x080
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beqz x29, notExternalInterrupt
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li x29, 0x1800 //000 disable interrupts
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li x29, 0x1800 //1800 disable interrupts
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csrw mstatus,x29
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mret
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@ -227,7 +227,7 @@ test7:
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sw a3, 0(a0)
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li x29, 0x800 //800 external interrupts
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csrw mie,x29
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li x29, 0x1808 //008 enable interrupts
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li x29, 0x1808 //1808 enable interrupts
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lr.w a5, (a0)
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csrw mstatus,x29 //Enable external interrupt (will jump instantly due to testbench setup)
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nop
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