PMP plugin passes regression tests
This commit is contained in:
Samuel Lindemer
parent
763eebeeba
commit
f2ce2eab00
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@ -211,6 +211,7 @@ class success : public std::exception { };
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#define MCYCLEH 0xB80 // MRW Upper 32 bits of mcycle, RV32I only.
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#define MINSTRETH 0xB82 // MRW Upper 32 bits of minstret, RV32I only.
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#define SSTATUS 0x100
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#define SIE 0x104
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#define STVEC 0x105
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@ -373,25 +374,9 @@ public:
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};
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};
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bool lrscReserved;
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struct pmpcfg_s {
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uint32_t r : 1;
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uint32_t w : 1;
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uint32_t x : 1;
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uint32_t a : 2;
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uint32_t _dummy : 2;
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uint32_t l : 1;
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} __attribute__((packed));
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union pmpcfg_u {
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uint32_t raw;
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pmpcfg_s reg[4];
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};
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pmpcfg_u pmpcfg[4];
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uint32_t pmpaddr[16];
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RiscvGolden() {
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pc = 0x80000000;
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regs[0] = 0;
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@ -416,10 +401,6 @@ public:
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ipInput = 0;
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stepCounter = 0;
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lrscReserved = false;
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for (int i = 0; i < 4; i++)
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pmpcfg[i].raw = 0;
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for (int i = 0; i < 16; i++)
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pmpaddr[i] = 0;
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}
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virtual void rfWrite(int32_t address, int32_t data) {
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@ -444,9 +425,7 @@ public:
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enum AccessKind {READ,WRITE,EXECUTE,READ_WRITE};
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virtual bool isMmuRegion(uint32_t v) = 0;
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bool v2p(uint32_t v, uint32_t *p, AccessKind kind) {
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bool v2p(uint32_t v, uint32_t *p, AccessKind kind){
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uint32_t effectivePrivilege = status.mprv && kind != EXECUTE ? status.mpp : privilege;
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if(effectivePrivilege == 3 || satp.mode == 0 || !isMmuRegion(v)){
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*p = v;
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@ -549,7 +528,7 @@ public:
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virtual bool csrRead(int32_t csr, uint32_t *value){
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if(((csr >> 8) & 0x3) > privilege) return true;
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switch(csr) {
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switch(csr){
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case MSTATUS: *value = status.raw & MSTATUS_READ_MASK; break;
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case MIP: *value = getIp().raw; break;
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case MIE: *value = ie.raw; break;
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@ -571,7 +550,6 @@ public:
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case SEPC: *value = sepc; break;
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case SSCRATCH: *value = sscratch; break;
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case SATP: *value = satp.raw; break;
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default: return true; break;
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}
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return false;
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@ -610,6 +588,8 @@ public:
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case SCAUSE: scause.raw = value; break;
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case STVAL: sbadaddr = value; break;
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case SEPC: sepc = value; break;
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case SSCRATCH: sscratch = value; break;
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case SATP: satp.raw = value; break;
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default: ilegalInstruction(); return true; break;
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}
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@ -15,7 +15,7 @@ CSR_SKIP_TEST?=no
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EBREAK?=no
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FENCEI?=no
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MMU?=yes
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PMP?=yes
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PMP?=no
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SEED?=no
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LRSC?=no
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AMO?=no
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@ -46,6 +46,7 @@ abstract class VexRiscvPosition(name: String) extends ConfigPosition[VexRiscvCo
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class VexRiscvUniverse extends ConfigUniverse
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object VexRiscvUniverse{
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val CACHE_ALL = new VexRiscvUniverse
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val CATCH_ALL = new VexRiscvUniverse
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val MMU = new VexRiscvUniverse
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val PMP = new VexRiscvUniverse
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@ -322,9 +323,10 @@ class IBusDimension(rvcRate : Double) extends VexRiscvDimension("IBus") {
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override def randomPositionImpl(universes: Seq[ConfigUniverse], r: Random) = {
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val catchAll = universes.contains(VexRiscvUniverse.CATCH_ALL)
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val cacheAll = universes.contains(VexRiscvUniverse.CACHE_ALL)
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val mmuConfig = if(universes.contains(VexRiscvUniverse.MMU)) MmuPortConfig( portTlbSize = 4) else null
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if(r.nextDouble() < 0.5){
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if(r.nextDouble() < 0.5 && !cacheAll){
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val latency = r.nextInt(5) + 1
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val compressed = r.nextDouble() < rvcRate
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val injectorStage = r.nextBoolean() || latency == 1
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@ -403,13 +405,14 @@ class DBusDimension extends VexRiscvDimension("DBus") {
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override def randomPositionImpl(universes: Seq[ConfigUniverse], r: Random) = {
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val catchAll = universes.contains(VexRiscvUniverse.CATCH_ALL)
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val cacheAll = universes.contains(VexRiscvUniverse.CACHE_ALL)
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val mmuConfig = if(universes.contains(VexRiscvUniverse.MMU)) MmuPortConfig( portTlbSize = 4) else null
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val noMemory = universes.contains(VexRiscvUniverse.NO_MEMORY)
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val noWriteBack = universes.contains(VexRiscvUniverse.NO_WRITEBACK)
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if(r.nextDouble() < 0.4 || noMemory){
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if((r.nextDouble() < 0.4 || noMemory) && !cacheAll){
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val withLrSc = catchAll
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val earlyInjection = r.nextBoolean() && !universes.contains(VexRiscvUniverse.NO_WRITEBACK)
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new VexRiscvPosition("Simple" + (if(earlyInjection) "Early" else "Late")) {
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@ -760,18 +763,15 @@ class TestIndividualFeatures extends MultithreadedFunSuite {
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}
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} else {
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if(machineOsRate > rand.nextDouble()) {
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universe += VexRiscvUniverse.CACHE_ALL
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universe += VexRiscvUniverse.CATCH_ALL
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universe += VexRiscvUniverse.PMP
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if(demwRate < rand.nextDouble()){
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universe += VexRiscvUniverse.NO_WRITEBACK
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}
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}
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if(demwRate > rand.nextDouble()){
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}else if(demRate > rand.nextDouble()){
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if(demRate > rand.nextDouble()){
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universe += VexRiscvUniverse.NO_WRITEBACK
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} else {
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universe += VexRiscvUniverse.NO_WRITEBACK
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universe += VexRiscvUniverse.NO_MEMORY
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}
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}
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