Merge remote-tracking branch 'origin/dev'
This commit is contained in:
commit
f3d7442e2d
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@ -207,12 +207,14 @@ case class DataCacheCpuBus(p : DataCacheConfig, mmu : MemoryTranslatorBusParamet
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val redo = Bool()
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val flush = Stream(DataCacheFlush(p.lineCount))
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val writesPending = Bool()
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override def asMaster(): Unit = {
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master(execute)
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master(memory)
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master(writeBack)
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master(flush)
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in(redo)
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in(redo, writesPending)
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}
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}
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@ -717,6 +719,8 @@ class DataCache(val p : DataCacheConfig, mmuParameter : MemoryTranslatorBusParam
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}
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val uncached = history.readAsync(rPtr.resized)
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val full = RegNext(wPtr - rPtr >= pendingMax-1)
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val empty = wPtr === rPtr
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io.cpu.writesPending := !empty
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io.cpu.execute.haltIt setWhen(full)
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}
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|
|
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@ -1,6 +1,6 @@
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package vexriscv.plugin
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import vexriscv.{DecoderService, ExceptionCause, ExceptionService, JumpService, Stage, Stageable, VexRiscv}
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import vexriscv.{DecoderService, ExceptionCause, ExceptionService, Stage, Stageable, VexRiscv}
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import spinal.core._
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import spinal.lib._
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import spinal.lib.bus.bmb.WeakConnector
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@ -92,9 +92,7 @@ object CfuPlugin{
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case class CfuPluginEncoding(instruction : MaskedLiteral,
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functionId : List[Range],
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input2Kind : CfuPlugin.Input2Kind.E,
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withCmd : Boolean = true,
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withRsp : Boolean = true){
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input2Kind : CfuPlugin.Input2Kind.E){
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val functionIdWidth = functionId.map(_.size).sum
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}
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@ -113,7 +111,6 @@ class CfuPlugin(val stageCount : Int,
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// assert(p.CFU_FUNCTION_ID_W == 3)
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var bus : CfuBus = null
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// var redoInterface : Flow[UInt] = null
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lazy val forkStage = pipeline.execute
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lazy val joinStage = pipeline.stages(Math.min(pipeline.stages.length - 1, pipeline.indexOf(forkStage) + stageCount))
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@ -123,45 +120,31 @@ class CfuPlugin(val stageCount : Int,
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val CFU_IN_FLIGHT = new Stageable(Bool()).setCompositeName(this, "CFU_IN_FLIGHT")
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val CFU_ENCODING = new Stageable(UInt(log2Up(encodings.size) bits)).setCompositeName(this, "CFU_ENCODING")
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val CFU_INPUT_2_KIND = new Stageable(CfuPlugin.Input2Kind()).setCompositeName(this, "CFU_INPUT_2_KIND")
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val CFU_WITH_CMD = new Stageable(Bool()).setCompositeName(this, "CFU_WITH_CMD")
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val CFU_WITH_RSP = new Stageable(Bool()).setCompositeName(this, "CFU_WITH_RSP")
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override def setup(pipeline: VexRiscv): Unit = {
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import pipeline._
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import pipeline.config._
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// val pcManagerService = pipeline.service(classOf[JumpService])
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// if(encodings.contains(_.cmd)redoInterface = pcManagerService.createJumpInterface(pipeline.writeBack)
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bus = master(CfuBus(p))
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val decoderService = pipeline.service(classOf[DecoderService])
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decoderService.addDefault(CFU_ENABLE, False)
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decoderService.addDefault(CFU_WITH_CMD, False)
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decoderService.addDefault(CFU_WITH_RSP, False)
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for((encoding, id) <- encodings.zipWithIndex){
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var actions : List[(Stageable[_ <: BaseType], Any)] = List(
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var actions = List(
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CFU_ENABLE -> True,
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REGFILE_WRITE_VALID -> True,
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BYPASSABLE_EXECUTE_STAGE -> Bool(stageCount == 0),
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BYPASSABLE_MEMORY_STAGE -> Bool(stageCount <= 1),
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RS1_USE -> True,
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CFU_ENCODING -> U(id),
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CFU_WITH_CMD -> Bool(encoding.withCmd),
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CFU_WITH_RSP -> Bool(encoding.withRsp)
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CFU_INPUT_2_KIND -> encoding.input2Kind()
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)
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if(encoding.withCmd){
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actions :+= RS1_USE -> True
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actions :+= CFU_INPUT_2_KIND -> encoding.input2Kind()
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encoding.input2Kind match {
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case CfuPlugin.Input2Kind.RS =>
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actions :+= RS2_USE -> True
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case CfuPlugin.Input2Kind.IMM_I =>
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}
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}
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if(encoding.withRsp){
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actions :+= REGFILE_WRITE_VALID -> True
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actions :+= BYPASSABLE_EXECUTE_STAGE -> Bool(stageCount == 0)
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actions :+= BYPASSABLE_MEMORY_STAGE -> Bool(stageCount <= 1)
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encoding.input2Kind match {
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case CfuPlugin.Input2Kind.RS =>
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actions :+= RS2_USE -> True
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case CfuPlugin.Input2Kind.IMM_I =>
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}
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decoderService.add(
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@ -208,7 +191,7 @@ class CfuPlugin(val stageCount : Int,
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import forkStage._
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input(CFU_ENABLE).clearWhen(!input(LEGAL_INSTRUCTION))
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val hazard = stages.dropWhile(_ != forkStage).tail.map(s => s.arbitration.isValid && s.input(HAS_SIDE_EFFECT)).orR
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val scheduleWish = arbitration.isValid && input(CFU_ENABLE) && input(CFU_WITH_CMD)
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val scheduleWish = arbitration.isValid && input(CFU_ENABLE)
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val schedule = scheduleWish && !hazard
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arbitration.haltItself setWhen(scheduleWish && hazard)
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@ -251,13 +234,12 @@ class CfuPlugin(val stageCount : Int,
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bus.rsp.combStage()
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}
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val hazard = stages.dropWhile(_ != joinStage).tail.map(s => s.arbitration.isValid && s.input(HAS_SIDE_EFFECT)).orR
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rsp.ready := False
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when((arbitration.isValid || input(CFU_IN_FLIGHT)) && input(CFU_WITH_RSP)){
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arbitration.haltItself setWhen(!rsp.valid || hazard)
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rsp.ready := !arbitration.isStuckByOthers && !hazard
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when(input(CFU_IN_FLIGHT)){
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arbitration.haltItself setWhen(!rsp.valid)
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rsp.ready := !arbitration.isStuckByOthers
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output(REGFILE_WRITE_DATA) := rsp.outputs(0)
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if(p.CFU_WITH_STATUS) when(rsp.fire){
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if(p.CFU_WITH_STATUS) when(arbitration.isFiring){
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switch(rsp.status) {
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for (i <- 1 to 6) is(i) {
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csr.status.flags(i-1) := True
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|
|
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@ -39,10 +39,10 @@ object CsrAccess {
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case class ExceptionPortInfo(port : Flow[ExceptionCause],stage : Stage, priority : Int, codeWidth : Int)
|
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case class CsrPluginConfig(
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catchIllegalAccess : Boolean,
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mvendorid : BigInt,
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marchid : BigInt,
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mimpid : BigInt,
|
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mhartid : BigInt,
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var mvendorid : BigInt,
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var marchid : BigInt,
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var mimpid : BigInt,
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var mhartid : BigInt,
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misaExtensionsInit : Int,
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misaAccess : CsrAccess,
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mtvecAccess : CsrAccess,
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@ -498,7 +498,7 @@ class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with Excep
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|||
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object ENV_CTRL extends Stageable(EnvCtrlEnum())
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object IS_CSR extends Stageable(Bool)
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object IS_SFENCE_VMA extends Stageable(Bool)
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object RESCHEDULE_NEXT extends Stageable(Bool)
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||||
object CSR_WRITE_OPCODE extends Stageable(Bool)
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object CSR_READ_OPCODE extends Stageable(Bool)
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||||
object PIPELINED_CSR_READ extends Stageable(Bits(32 bits))
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||||
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@ -641,8 +641,9 @@ class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with Excep
|
|||
if(utimeAccess != CsrAccess.NONE) utime = in UInt(64 bits) setName("utime")
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||||
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||||
if(supervisorGen) {
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decoderService.addDefault(IS_SFENCE_VMA, False)
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decoderService.add(SFENCE_VMA, List(IS_SFENCE_VMA -> True))
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decoderService.addDefault(RESCHEDULE_NEXT, False)
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decoderService.add(SFENCE_VMA, List(RESCHEDULE_NEXT -> True))
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decoderService.add(FENCE_I, List(RESCHEDULE_NEXT -> True))
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||||
}
|
||||
|
||||
xretAwayFromMachine = False
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||||
|
@ -1149,7 +1150,7 @@ class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with Excep
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|||
redoInterface.payload := decode.input(PC)
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|
||||
val rescheduleNext = False
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when(execute.arbitration.isValid && execute.input(IS_SFENCE_VMA)) { rescheduleNext := True }
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when(execute.arbitration.isValid && execute.input(RESCHEDULE_NEXT)) { rescheduleNext := True }
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duringWrite(CSR.SATP) { rescheduleNext := True }
|
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|
||||
when(rescheduleNext){
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||||
|
@ -1587,7 +1588,7 @@ class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with Excep
|
|||
if(!pipelineCsrRead) output(REGFILE_WRITE_DATA) := readData
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||||
}
|
||||
|
||||
when(arbitration.isValid && (input(IS_CSR) || (if(supervisorGen) input(IS_SFENCE_VMA) else False))) {
|
||||
when(arbitration.isValid && (input(IS_CSR) || (if(supervisorGen) input(RESCHEDULE_NEXT) else False))) {
|
||||
arbitration.haltItself setWhen(blockedBySideEffects)
|
||||
}
|
||||
|
||||
|
@ -1697,11 +1698,11 @@ class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with Excep
|
|||
}
|
||||
|
||||
//When no PMP =>
|
||||
// if(!csrMapping.mapping.contains(0x3A0)){
|
||||
// when(arbitration.isValid && input(IS_CSR) && U(csrAddress) >= 0x3A0 && U(csrAddress) <= 0x3EF){
|
||||
// csrMapping.allowCsrSignal := True
|
||||
// }
|
||||
// }
|
||||
if(!csrMapping.mapping.contains(0x3A0)){
|
||||
when(arbitration.isValid && input(IS_CSR) && (csrAddress(11 downto 2) ## B"00" === 0x3A0 || csrAddress(11 downto 4) ## B"0000" === 0x3B0)){
|
||||
csrMapping.allowCsrSignal := True
|
||||
}
|
||||
}
|
||||
|
||||
illegalAccess clearWhen(csrMapping.allowCsrSignal)
|
||||
|
||||
|
|
|
@ -160,6 +160,7 @@ class DBusCachedPlugin(val config : DataCacheConfig,
|
|||
object MEMORY_LRSC extends Stageable(Bool)
|
||||
object MEMORY_AMO extends Stageable(Bool)
|
||||
object MEMORY_FENCE extends Stageable(Bool)
|
||||
object MEMORY_FENCE_WR extends Stageable(Bool)
|
||||
object MEMORY_FORCE_CONSTISTENCY extends Stageable(Bool)
|
||||
object IS_DBUS_SHARING extends Stageable(Bool())
|
||||
object MEMORY_VIRTUAL_ADDRESS extends Stageable(UInt(32 bits))
|
||||
|
@ -267,6 +268,8 @@ class DBusCachedPlugin(val config : DataCacheConfig,
|
|||
case true => {
|
||||
decoderService.addDefault(MEMORY_FENCE, False)
|
||||
decoderService.add(FENCE, List(MEMORY_FENCE -> True))
|
||||
decoderService.addDefault(MEMORY_FENCE_WR, False)
|
||||
decoderService.add(FENCE_I, List(MEMORY_FENCE_WR -> True))
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -405,6 +408,12 @@ class DBusCachedPlugin(val config : DataCacheConfig,
|
|||
)
|
||||
}
|
||||
|
||||
if(withWriteResponse){
|
||||
when(arbitration.isValid && input(MEMORY_FENCE_WR) && cache.io.cpu.writesPending){
|
||||
arbitration.haltItself := True
|
||||
}
|
||||
}
|
||||
|
||||
if(tightlyGen){
|
||||
tightlyCoupledAddressStage match {
|
||||
case false =>
|
||||
|
|
|
@ -0,0 +1,142 @@
|
|||
:0200000480007A
|
||||
:10000000971000009380008873905030130E1000FA
|
||||
:1000100073101030930010007390503073215030E3
|
||||
:10002000E31001067390501073215010E31A01047D
|
||||
:1000300097100000938000857390503093009000DB
|
||||
:100040007390203473212034E31C1102130E20001E
|
||||
:10005000F32000B0732100B0E3D42002F32020B0DD
|
||||
:10006000732120B0E3DE2000F32000C0732100C024
|
||||
:10007000E3D82000F32020C0732120C0E3D2200069
|
||||
:10008000F32010C0732110C063DC207E97000000B5
|
||||
:100090009380400873905030970000009380C00216
|
||||
:1000A00073901034B710000093800080739000307C
|
||||
:1000B000730020306F00C07C6F00807C6F00407C3C
|
||||
:1000C0006F00007CF3201014F3202014F3200010A4
|
||||
:1000D000F3203014F3204014130E3000F32000C03E
|
||||
:1000E000732100C063DE2078F32020C0732120C07C
|
||||
:1000F00063D82078F32010C0732110C063D2207819
|
||||
:10010000730000006F00C0771300000013000000B0
|
||||
:10011000F3201034F3202034F3200030F320303467
|
||||
:10012000F3204034F3201014F3202014F3200010A7
|
||||
:10013000F3203014F32040149700000093808006D1
|
||||
:1001400073905030970000009380800273901034B9
|
||||
:100150009300000073900030730020306F004072F5
|
||||
:100160006F0000726F00C0716F008071130E40004D
|
||||
:10017000F32000C0732100C063D42070F32020C09E
|
||||
:10018000732120C063DE206EF32010C0732110C0E5
|
||||
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|
||||
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|
||||
:1001B000F3204034F3201014F3202014F320001017
|
||||
:1001C000F3203014F32040149300F0FF739060305C
|
||||
:1001D00093000000739060109700000093808008E7
|
||||
:1001E00073905030970000009380C00273901034D9
|
||||
:1001F000B7100000938000807390003073002030AF
|
||||
:100200006F0000686F00C0676F0080676F00406715
|
||||
:10021000F3201014F3202014F3200010F3203014E6
|
||||
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|
||||
:1002300063D82064F32020C0732120C063D22064DF
|
||||
:10024000F32010C0732110C063DC20627300000033
|
||||
:100250006F00006313000000130000001300000093
|
||||
:10026000F3201034F3202034F3200030F320303416
|
||||
:10027000F3204034F3201014F3202014F320001056
|
||||
:10028000F3203014F3204014970000009380800482
|
||||
:100290007390503097000000938080027390103468
|
||||
:1002A0009300000073900030730020306F00405DB9
|
||||
:1002B0006F00005D6F00C05C6F00805CF32000C0C9
|
||||
:1002C0006F00005C6F00C05B1300000013000000B3
|
||||
:1002D000F3201034F3202034F3200030F3203034A6
|
||||
:1002E000F3204034F3201014F3202014F3200010E6
|
||||
:1002F000F3203014F3204014970000009380800412
|
||||
:1003000073905030970000009380800273901034F7
|
||||
:100310009300000073900030730020306F0040564F
|
||||
:100320006F0000566F00C0556F008055F32020C04D
|
||||
:100330006F0000556F00C054130000001300000050
|
||||
:10034000F3201034F3202034F3200030F320303435
|
||||
:10035000F3204034F3201014F3202014F320001075
|
||||
:10036000F3203014F32040149700000093808004A1
|
||||
:100370007390503097000000938080027390103487
|
||||
:100380009300000073900030730020306F00404FE6
|
||||
:100390006F00004F6F00C04E6F00804EF32010C002
|
||||
:1003A0006F00004E6F00C04D1300000013000000EE
|
||||
:1003B000F3201034F3202034F3200030F3203034C5
|
||||
:1003C000F3204034F3201014F3202014F320001005
|
||||
:1003D000F3203014F3204014930000007390603039
|
||||
:1003E0009300F0FF739060109700000093808005E9
|
||||
:1003F00073905030970000009380C00273901034C7
|
||||
:10040000B71000009380008073900030730020309C
|
||||
:100410006F0000476F00C0466F0080466F00404687
|
||||
:10042000F3201014F3202014F3200010F3203014D4
|
||||
:10043000F3204014F32000C06F0080446F0040445C
|
||||
:10044000F3201034F3202034F3200030F320303434
|
||||
:10045000F3204034F3201014F3202014F320001074
|
||||
:10046000F3203014F320401497000000938080059F
|
||||
:1004700073905030970000009380C0027390103446
|
||||
:10048000B71000009380008073900030730020301C
|
||||
:100490006F00003F6F00C03E6F00803E6F00403E27
|
||||
:1004A000F3201014F3202014F3200010F320301454
|
||||
:1004B000F3204014F32020C06F00803C6F00403CCC
|
||||
:1004C000F3201034F3202034F3200030F3203034B4
|
||||
:1004D000F3204034F3201014F3202014F3200010F4
|
||||
:1004E000F3203014F320401497000000938080051F
|
||||
:1004F00073905030970000009380C00273901034C6
|
||||
:10050000B71000009380008073900030730020309B
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
:1005C000F3204034F3201014F3202014F320001003
|
||||
:1005D000F3203014F320401497000000938080042F
|
||||
:1005E0007390503097000000938080027390103415
|
||||
:1005F0009300000073900030730020306F0040289B
|
||||
:100600006F0000286F00C0276F008027F32020C0F4
|
||||
:100610006F0000276F00C0261300000013000000C9
|
||||
:10062000F3201034F3202034F3200030F320303452
|
||||
:10063000F3204034F3201014F3202014F320001092
|
||||
:10064000F3203014F32040149700000093808004BE
|
||||
:1006500073905030970000009380800273901034A4
|
||||
:100660009300000073900030730020306F00402131
|
||||
:100670006F0000216F00C0206F008020F32010C0A9
|
||||
:100680006F0000206F00C01F130000001300000067
|
||||
:10069000F3201034F3202034F3200030F3203034E2
|
||||
:1006A000F3204034F3201014F3202014F320001022
|
||||
:1006B000F3203014F3204014970000009380801C36
|
||||
:1006C00073905030B740000073900030F32000303A
|
||||
:1006D00037610080B3F02000374100006392201A98
|
||||
:1006E000970000009380001D07A00000F320003059
|
||||
:1006F00037610080B3F0200063942018B7400000F9
|
||||
:1007000073900030F320003037610080B3F0200098
|
||||
:1007100037410000639620169700000093808019EF
|
||||
:1007200027A00000F320003037610080B3F02000E4
|
||||
:100730003741000063962014D30000E037010040E9
|
||||
:1007400063902014F320003037610080B3F0200064
|
||||
:100750003741000063962012B7000080538000F0FC
|
||||
:10076000F320003037610080B3F02000639A20103E
|
||||
:10077000B740000073900030B700003F538000F096
|
||||
:10078000F320003037610080B3F02000639A200E20
|
||||
:10079000B740000073900030D37000C0F3200030E9
|
||||
:1007A00037610080B3F02000639C200CB74000004C
|
||||
:1007B00073900030B7000040538000F0F320003009
|
||||
:1007C00037610080B3F02000639C200AB74000002E
|
||||
:1007D00073900030D37000C0F32000303761008088
|
||||
:1007E000B3F0200037410000639C2008B700804F21
|
||||
:1007F000538000F0F320003037610080B3F0200018
|
||||
:1008000063902008B740000073900030D37000C0A0
|
||||
:10081000F320003037610080B3F02000639220069F
|
||||
:10082000B74000007390003073103000F3200030A8
|
||||
:1008300037610080B3F0200063942004B7400000CB
|
||||
:100840007390003073102000F32000303761008077
|
||||
:10085000B3F0200063962002B74000007390003090
|
||||
:1008600073101000F320003037610080B3F02000D7
|
||||
:1008700063982000B7400000739000306F000001C3
|
||||
:10088000370110F0130141F22320C101370110F0AC
|
||||
:10089000130101F2232001001300000013000000E7
|
||||
:1008A00013000000130000001300000013000000FC
|
||||
:0808B000000000400000000000
|
||||
:00000001FF
|
|
@ -630,7 +630,7 @@ public:
|
|||
#endif
|
||||
|
||||
default: {
|
||||
// if(csr >= 0x3A0 && csr <= 0x3EF) break; //PMP
|
||||
if(csr >= 0x3A0 && csr <= 0x3A3 || csr >= 0x3B0 && csr <= 0x3BF) break; //PMP
|
||||
return true;
|
||||
}break;
|
||||
}
|
||||
|
@ -686,7 +686,7 @@ public:
|
|||
#endif
|
||||
|
||||
default: {
|
||||
// if(csr >= 0x3A0 && csr <= 0x3EF) break; //PMP
|
||||
if(csr >= 0x3A0 && csr <= 0x3A3 || csr >= 0x3B0 && csr <= 0x3BF) break; //PMP
|
||||
ilegalInstruction();
|
||||
return true;
|
||||
}break;
|
||||
|
|
Loading…
Reference in New Issue