Fix InstructionCache Bmb bridge

2019-05-22 19:03:26 +02:00 · 2019-05-22 19:03:26 +02:00 · f6f94ad7c1
parent 9b49638654
commit f6f94ad7c1
1 changed files with 1 additions and 1 deletions
--- a/src/main/scala/vexriscv/ip/InstructionCache.scala
+++ b/src/main/scala/vexriscv/ip/InstructionCache.scala
@ -254,7 +254,7 @@ case class InstructionCacheMemBus(p : InstructionCacheConfig) extends Bundle wit
    bus.cmd.arbitrationFrom(cmd)
    bus.cmd.opcode := Bmb.Cmd.Opcode.READ
    bus.cmd.address := cmd.address.resized
-    bus.cmd.length := (1 << p.bytePerLine) - 1
+    bus.cmd.length := p.bytePerLine - 1
    bus.cmd.last := True
    rsp.valid := bus.rsp.valid
    rsp.data := bus.rsp.data