Add trace option to regresion

This commit is contained in:
Charles Papon 2017-03-18 14:06:42 +01:00
parent 5e9da0f27a
commit fc1bb7249a
2 changed files with 21 additions and 6 deletions

View File

@ -165,15 +165,21 @@ public:
virtual void checks(){} virtual void checks(){}
virtual void pass(){ throw success();} virtual void pass(){ throw success();}
virtual void fail(){ throw std::exception();} virtual void fail(){ throw std::exception();}
void dump(long i){
#ifdef TRACE
tfp->dump(i);
#endif
}
Workspace* run(uint32_t timeout = 5000){ Workspace* run(uint32_t timeout = 5000){
// cout << "Start " << name << endl; // cout << "Start " << name << endl;
currentTime = 4; currentTime = 4;
// init trace dump // init trace dump
Verilated::traceEverOn(true); Verilated::traceEverOn(true);
#ifdef TRACE
VerilatedVcdC* tfp = new VerilatedVcdC; VerilatedVcdC* tfp = new VerilatedVcdC;
top->trace(tfp, 99); top->trace(tfp, 99);
tfp->open((string(name)+ ".vcd").c_str()); tfp->open((string(name)+ ".vcd").c_str());
#endif
// Reset // Reset
top->clk = 0; top->clk = 0;
@ -183,7 +189,7 @@ public:
top->eval(); currentTime = 3; top->eval(); currentTime = 3;
top->reset = 1; top->reset = 1;
top->eval(); top->eval();
tfp->dump(0); dump(0);
top->reset = 0; top->reset = 0;
top->eval(); currentTime = 2; top->eval(); currentTime = 2;
top->clk = 1; top->clk = 1;
@ -258,7 +264,7 @@ public:
// dump variables into VCD file and toggle clock // dump variables into VCD file and toggle clock
for (uint32_t clk = 0; clk < 2; clk++) { for (uint32_t clk = 0; clk < 2; clk++) {
tfp->dump(i+ clk); dump(i+ clk);
top->clk = !top->clk; top->clk = !top->clk;
top->eval(); top->eval();
@ -291,9 +297,11 @@ public:
tfp->dump(i); dump(i);
tfp->dump(i+1); dump(i+1);
#ifdef TRACE
tfp->close(); tfp->close();
#endif
return this; return this;
} }
}; };

View File

@ -1,8 +1,15 @@
TRACE=no
ifeq ($(TRACE),yes)
VERILATOR_ARGS += --trace
ADDCFLAGS += -DTRACE
endif
run: compile run: compile
./obj_dir/VVexRiscv ./obj_dir/VVexRiscv
verilate: verilate:
verilator -cc ../../../../VexRiscv.v -O3 -CFLAGS -std=c++11 --gdbbt --trace -Wno-WIDTH --x-assign unique --exe main.cpp verilator -cc ../../../../VexRiscv.v -O3 -CFLAGS -std=c++11 ${ADDCFLAGS} --gdbbt ${VERILATOR_ARGS} -Wno-WIDTH --x-assign unique --exe main.cpp
compile: verilate compile: verilate
make -j -C obj_dir/ -f VVexRiscv.mk VVexRiscv make -j -C obj_dir/ -f VVexRiscv.mk VVexRiscv