208 lines
6.8 KiB
Markdown
208 lines
6.8 KiB
Markdown
This example is for the
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[Lattice iCE40HX-8K Breakout Board](http://www.latticesemi.com/Products/DevelopmentBoardsAndKits/iCE40HX8KBreakoutBoard.aspx).
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An image of this board is shown below;
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This board can be purchased for ~$USD 49 directly from Lattice and is supported
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by the IceStorm
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[`iceprog`](https://github.com/cliffordwolf/icestorm/tree/master/iceprog) tool.
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# Bootloader operations
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A bootloader is implemented in a ROM within the FPGA bitfile. It configure the SPI and attempt to read the first word in 'XIP' area of the flash (0xE0040000 in CPU address space, 0x40000 in flash). If this first word is not 0xFFFFFFFF and the same value is read 3 times,
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then the bootloader jump at 0xE0040000.
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# Using the example
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## Before Starting
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Before starting make sure that your board is configured for `CRAM Programming`
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mode. This requires removing jumper `J7` and putting the pair of jumpers on
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`J6` to be parallel to the text on the board.
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This is shown in **Figure 5** of the
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[iCE40HX-8K Breakout Board User Guide](http://www.latticesemi.com/view_document?document_id=50373).
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which is also reproduced below;
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Once your board is ready, you should follow the setup instructions at the
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[top level](../../../README.md).
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You should make sure you have the following tools installed;
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* Yosys
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* arachne-pnr
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* icestorm tools (like icepack and iceprog)
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* riscv toolchain
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* sbt
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## Building
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You should be able to just type `make compile` and get output similar to this;
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```
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...
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place time 10.14s
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route...
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pass 1, 15 shared.
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pass 2, 4 shared.
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pass 3, 1 shared.
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pass 4, 0 shared.
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After routing:
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span_4 4406 / 29696
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span_12 951 / 5632
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route time 9.12s
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write_txt bin/toplevel.asc...
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icepack bin/toplevel.asc bin/toplevel.bin
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```
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The process should take around 30 seconds on a reasonable fast computer.
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## Programming
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Make sure the FPGA board is the only USB peripheral with ID 0403:6010
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For example, this is bad:
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```
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user@lafite:~$ lsusb -d 0403:6010
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Bus 001 Device 088: ID 0403:6010 Future Technology Devices International, Ltd FT2232C Dual USB-UART/FIFO IC
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Bus 001 Device 090: ID 0403:6010 Future Technology Devices International, Ltd FT2232C Dual USB-UART/FIFO IC
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```
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This is good:
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```
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user@lafite:~$ lsusb -d 0403:6010
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Bus 001 Device 088: ID 0403:6010 Future Technology Devices International, Ltd FT2232C Dual USB-UART/FIFO IC
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```
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After building you should be able to run `make prog`. You may need to run `make
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sudo-prog` if root is needed to access your USB devices.
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You should get output like the following;
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```
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lsusb -d 0403:6010
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Bus 001 Device 088: ID 0403:6010 Future Technology Devices International, Ltd FT2232C Dual USB-UART/FIFO IC
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iceprog -S bin/Murax_iCE40_hx8k_breakout_board_xip.bin
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init..
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cdone: high
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reset..
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cdone: low
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programming..
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cdone: high
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Bye.
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```
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WARNING: having this output does NOT guarantee you actually programmed anything in the FPGA!
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After programming nothing visual will happen, except the LEDs being off.
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The bootloader is waiting for a valid content in the flash (see Bootloader operations).
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## Programming flash image
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### Connect JTAG
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We will use vexrisc JTAG to program the flash, so you need openocd and a
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suitable JTAG dongle.
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Pin-out:
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```
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TCK: H16 aka J2.25
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TDO: G16 aka J2.26
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TDI: G15 aka J2.27
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TMS: F15 aka J2.28
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```
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In addition you need to connect the ground and VTarget aka VIO: J2.2 on the
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board.
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### Start GDB server / OpenOCD
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Make sure to use https://github.com/SpinalHDL/openocd_riscv
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Make sure to select the configuration file which match your JTAG dongle.
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An example with the dongle "ft2232h_breakout":
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```
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src/openocd -f tcl/interface/ftdi/ft2232h_breakout.cfg -c "set MURAX_CPU0_YAML ../VexRiscv/cpu0.yaml" -f tcl/target/murax_xip.cfg
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```
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You should get an output like below:
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```
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Open On-Chip Debugger 0.10.0+dev-01214-g0ace94f (2019-10-02-18:23)
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Licensed under GNU GPL v2
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For bug reports, read
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http://openocd.org/doc/doxygen/bugs.html
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../VexRiscv/cpu0.yaml
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adapter speed: 100 kHz
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adapter_nsrst_delay: 260
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Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.
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jtag_ntrst_delay: 250
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Info : set servers polling period to 50ms
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Error: libusb_get_string_descriptor_ascii() failed with LIBUSB_ERROR_INVALID_PARAM
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Info : clock speed 100 kHz
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Info : JTAG tap: fpga_spinal.bridge tap/device found: 0x10001fff (mfg: 0x7ff (<invalid>), part: 0x0001, ver: 0x1)
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Info : Listening on port 3333 for gdb connections
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requesting target halt and executing a soft reset
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Info : Listening on port 6666 for tcl connections
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Info : Listening on port 4444 for telnet connections
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```
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### Loading the flash with telnet
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First we connect and stop execution on the device:
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```
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user@lafite:~/Downloads/vexrisc_full/VexRiscv/src/main/c/murax/xipBootloader$ telnet 127.0.0.1 4444
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Trying 127.0.0.1...
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Connected to 127.0.0.1.
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Escape character is '^]'.
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Open On-Chip Debugger
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> reset
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JTAG tap: fpga_spinal.bridge tap/device found: 0x10001fff (mfg: 0x7ff (<invalid>), part: 0x0001, ver: 0x1)
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>
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```
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Now we can safely connect the J7 jumper on the board to be able to access the flash.
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After that, we can load the program in flash:
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```
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> flash erase_sector 0 4 4
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erased sectors 4 through 4 on flash bank 0 in 0.872235s
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> flash write_bank 0 /home/user/dev/vexrisc_fork/VexRiscv/src/main/c/murax/xipBootloader/demo_xip.bin 0x40000
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wrote 48 bytes from file /home/user/dev/vexrisc_fork/VexRiscv/src/main/c/murax/xipBootloader/demo_xip.bin to flash bank 0 at offset 0x00040000 in 0.285539s (0.164 KiB/s)
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> flash verify_bank 0 /home/user/dev/vexrisc_fork/VexRiscv/src/main/c/murax/xipBootloader/demo_xip.bin 0x40000
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read 48 bytes from file /home/user/dev/vexrisc_fork/VexRiscv/src/main/c/murax/xipBootloader/demo_xip.bin and flash bank 0 at offset 0x00040000 in 0.192036s (0.244 KiB/s)
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contents match
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> reset
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JTAG tap: fpga_spinal.bridge tap/device found: 0x10001fff (mfg: 0x7ff (<invalid>), part: 0x0001, ver: 0x1)
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> resume
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> exit
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Connection closed by foreign host.
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```
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From now the device runs the code from flash, LEDs shall display a dot moving from D9 to D2.
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### Loading flash using GDB / eclipse
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```
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src/openocd -f tcl/interface/ftdi/ft2232h_breakout.cfg -c "set MURAX_CPU0_YAML ../VexRiscv/cpu0.yaml" -f tcl/target/murax_xip.cfg
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```
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- Make sure J7 is connected.
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- Connect to GDB / eclipse as usual.
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From there code loading, step, break points works as usual (including software break points in flash).
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## Update hardware/bootloader
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- Stop any OpenOCD connection
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- Remove J7, then:
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```
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make clean prog
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```
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- Remember to check a single FTDI device is listed in the output. If not:
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- Disconnect the other devices
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```
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make prog
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```
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- Connect J7, flash software shall start executing.
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## Flash software
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Refer to "Loading the flash with telnet" or "Loading flash using GDB / eclipse".
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