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https://github.com/SpinalHDL/VexRiscv.git
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3b0f2e9551
travis job naming reduce verilator cache size Fix dcache test timeout travis cleaning travis wip verilator wip fix java 10 compilation Travis wip travis rework
7 lines
58 B
Makefile
7 lines
58 B
Makefile
.ONESHELL:
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include verilator.mk
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include regression.mk
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