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f4pga-examples
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added symplified download instructions 

Signed-off-by: Joshua Fife <jpfife17@gmail.com>
This commit is contained in:
Joshua Fife 2021-11-06 14:51:45 -06:00
parent 4a818ebf9a
commit 20d3fa8026
5 changed files with 7 additions and 7 deletions
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4
xc7/counter_test/README.rst
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@ -43,13 +43,13 @@ At completion, the bitstreams are located in the build directory:
.. code-block:: bash .. code-block:: bash
cd counter_test/build/<board> counter_test/build/<board>
Now, for **Arty and Basys3**, you can upload the design with: Now, for **Arty and Basys3**, you can upload the design with:
.. code-block:: bash .. code-block:: bash
openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit" TARGET="<board type>" make download -C counter_test
The result should be as follows: The result should be as follows:

4
xc7/linux_litex_demo/README.rst
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@ -22,13 +22,13 @@ At completion, the bitstreams are located in the build directory:
.. code-block:: bash .. code-block:: bash
cd linux_litex_demo/build/<board> linux_litex_demo/build/<board>
Now you can upload the design with: Now you can upload the design with:
.. code-block:: bash .. code-block:: bash
openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit" TARGET="<board type>" make download -C linux_litex_demo
.. note:: .. note::

2
xc7/picosoc_demo/README.rst
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@ -36,7 +36,7 @@ Now you can upload the design with:
.. code-block:: bash .. code-block:: bash
openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit" TARGET="<board type>" make download -C picosoc_demo
You should observe the following line in the OpenOCD output: You should observe the following line in the OpenOCD output:

2
xc7/pulse_width_led/README.rst
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@ -22,7 +22,7 @@ Now, you can upload the design with:
.. code-block:: bash .. code-block:: bash
openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit" TARGET="arty_35" make download -C pulse_width_led
After downloading the bitstream, you can experiment with and mix different amounts of red, green, and After downloading the bitstream, you can experiment with and mix different amounts of red, green, and
blue on RGB led 0 by toggling different switches and buttons on and off. From left to right: blue on RGB led 0 by toggling different switches and buttons on and off. From left to right:

2
xc7/timer/README.rst
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@ -21,7 +21,7 @@ Now, you can upload the design with:
.. code-block:: bash .. code-block:: bash
openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit" TARGET="basys3" make download -C timer
After downloading the bitstream you can start and stop the watch by toggling switch 0 on the board. After downloading the bitstream you can start and stop the watch by toggling switch 0 on the board.
Press the center button to reset the counter. The following gives a visual example: Press the center button to reset the counter. The following gives a visual example: