xc7/counter_test: use 'f4pga build'
Signed-off-by: Unai Martinez-Corral <umartinezcorral@antmicro.com>
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69268da8ed
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@ -2,9 +2,7 @@ current_dir := ${CURDIR}
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TOP := top
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TOP := top
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SOURCES := ${current_dir}/counter.v
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SOURCES := ${current_dir}/counter.v
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ifeq ($(TARGET),arty_35)
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ifeq ($(TARGET),arty_100)
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XDC := ${current_dir}/arty.xdc
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else ifeq ($(TARGET),arty_100)
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XDC := ${current_dir}/arty.xdc
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XDC := ${current_dir}/arty.xdc
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else ifeq ($(TARGET),nexys4ddr)
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else ifeq ($(TARGET),nexys4ddr)
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XDC := ${current_dir}/nexys4ddr.xdc
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XDC := ${current_dir}/nexys4ddr.xdc
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@ -17,5 +15,9 @@ else
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XDC := ${current_dir}/basys3.xdc
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XDC := ${current_dir}/basys3.xdc
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endif
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endif
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include ${current_dir}/../../common/common.mk
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ifeq ($(TARGET),arty_35)
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build:
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f4pga build --flow ./flow.json
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endif
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include ${current_dir}/../../common/common.mk
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@ -0,0 +1,25 @@
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{
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"default_part": "XC7A35TCSG324-1",
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"values": {
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"top": "top"
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},
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"dependencies": {
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"sources": [
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"counter.v"
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],
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"synth_log": "synth.log",
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"pack_log": "pack.log"
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},
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"XC7A35TCSG324-1": {
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"default_target": "bitstream",
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"dependencies": {
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"build_dir": "build/arty_35",
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"xdc": [
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"arty.xdc"
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]
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},
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"values": {
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"part": "xc7a35tcpg236-1"
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}
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}
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}
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