Made instructions clearer and added some information on the ifeq/else ifeq blocks
Signed-off-by: Joshua Fife <jpfife17@gmail.com>
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Joshua Fife
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Customizing the Makefiles from Symbiflow-examples For Your Own Designs
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=======================================================================
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A key step in creating your own designs is understanding how to use the Makefiles in symbiflow-examples. This tutorial walks you through some of the key aspects of working with the Makefiles in symbiflow-examples to allow for better debugging as well as how to tailor the Makefiles to your own designs.
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A key step in creating your own designs is understanding how to generate your own Makefiles to properly compile and build designs with the symbiflow toolchain. This tutorial walks you through some of the key aspects of working with Makefiles and explains how you can create Makefiles for your own designs.
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Example
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-------
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Every design in symbiflow has its own makefile. For example Counter-test <add links>, Picosoc, and Litex exmples all have there own unique makefiles for building the respective designs. To understand how these Makefiles are setup, lets take a look at a simple Makefile. The following code is taken from the Makefile within Counter-test and has been modified for simplicity to compile the design for the Basys3 board. Highlighted lines within the code below are of particular interest and will change depending on your design and hardware.
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Every design in symbiflow has its own makefile. For example `Counter-test <https://github.com/SymbiFlow/symbiflow-examples/blob/master/xc7/counter_test/Makefile>`_, `Linux Litex Demo <https://github.com/SymbiFlow/symbiflow-examples/blob/master/xc7/linux_litex_demo/Makefile>`_, and `Picosoc Demo <https://github.com/SymbiFlow/symbiflow-examples/blob/master/xc7/picosoc_demo/Makefile>`_ all have there own unique Makefiles for compiling and building respective designs. To understand how to set up a Makefile in symbiflow, lets take a look at a simple Makefile. The following code is based off of the Makefile within `Counter-test <https://github.com/SymbiFlow/symbiflow-examples/blob/master/xc7/counter_test/Makefile>`_ and has been modified slightly for simplicity. Highlighted lines within the code below are of particular interest and will change depending on your specific design elements and hardware. Lines that are not highlighted do not change from design to design and can be copy and pasted into your own Makefile.
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.. code-block:: bash
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:name: makefile-example
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@ -69,7 +70,7 @@ Line 4 in the Makefile shows how to add HDL files to the design. The general syn
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${current_dir}/<HDL file 4> \
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...
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You could also use wildcards to collect all HDL file types of a specific extension and add them to your design. For example, if you wanted to add all verilog files within the current directory to your design you could replace line 4 in the Makefile with:
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You could also use wildcards to collect all HDL file types of a specific extension and add them to your design. For example, if you wanted to add all verilog files within the current directory to your design, you could replace line 4 in the Makefile with:
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.. code-block:: bash
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:name: wildcard-example
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@ -77,7 +78,7 @@ You could also use wildcards to collect all HDL file types of a specific extensi
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VERILOG := ${current_dir}/*.v
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To include SystemVerilog in your design simply change the ``*.v`` above to a ``*.sv``. You might also want to change the ``VERILOG`` bash variables throughout the Makefile to ``SYSTEM_VERILOG`` to improve readability.
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To include SystemVerilog HDL in your designs simply change the ``.v`` extension in the examples above to a ``.sv``. You might also want to change the ``VERILOG`` bash variables throughout the Makefile to ``SYSTEM_VERILOG`` to improve readability.
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.. note::
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@ -85,7 +86,7 @@ To include SystemVerilog in your design simply change the ``*.v`` above to a ``*
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Setting the Board Type and Part Name
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-------------------------------------
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Line 5 in the example defines the board type for the project. The use of the term DEVICE may be confusing, but it does refer to a board type as you can see from the context below.
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Line 5 in the example Makefile defines the board type for the project. The use of the term DEVICE may be confusing, but it does refer to a board type as you can see from the context below.
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Several different board types are supported and a listing of the commands for each board type follow:
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@ -181,47 +182,6 @@ As shown on line 9 of the example makefile you will also need to define the spec
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PARTNAME:= xc7a200tsbg484-1
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A Note on some example designs use of ifeq, else ifeq blocks
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-------------------------------------------------------------
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If you take a look at many of the example designs within symbiflow you will find an ifeq else ifeq block. For example the following snipet is from lines 9-39 of the Makefile within Counter-test:
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.. code-block:: bash
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:name: counter-test Makefile snippet
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ifeq ($(TARGET),arty_35)
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PARTNAME := xc7a35tcsg324-1
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XDC:=${current_dir}/arty.xdc
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BOARD_BUILDDIR := ${BUILDDIR}/arty_35
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else ifeq ($(TARGET),arty_100)
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PARTNAME:= xc7a100tcsg324-1
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XDC:=${current_dir}/arty.xdc
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DEVICE:= xc7a100t_test
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BOARD_BUILDDIR := ${BUILDDIR}/arty_100
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else ifeq ($(TARGET),nexys4ddr)
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PARTNAME:= xc7a100tcsg324-1
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XDC:=${current_dir}/nexys4ddr.xdc
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DEVICE:= xc7a100t_test
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BOARD_BUILDDIR := ${BUILDDIR}/nexys4ddr
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else ifeq ($(TARGET),zybo)
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PARTNAME:= xc7z010clg400-1
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XDC:=${current_dir}/zybo.xdc
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DEVICE:= xc7z010_test
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BITSTREAM_DEVICE:= zynq7
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BOARD_BUILDDIR := ${BUILDDIR}/zybo
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VERILOG:=${current_dir}/counter_zynq.v
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else ifeq ($(TARGET),nexys_video)
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PARTNAME:= xc7a200tsbg484-1
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XDC:=${current_dir}/nexys_video.xdc
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DEVICE:= xc7a200t_test
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BOARD_BUILDDIR := ${BUILDDIR}/nexys_video
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else
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PARTNAME:= xc7a35tcpg236-1
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XDC:=${current_dir}/basys3.xdc
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BOARD_BUILDDIR := ${BUILDDIR}/basys3
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endif
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This ifeq else ifeq works as an if else block to set specific PARTNAMES and DEVICE parameters given the board type as defined in the TARGET variable set before running make.
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Constraint files
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----------------
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@ -299,3 +259,58 @@ Note that the lines 22, 25, 28, and 31 (.eblif, net, place, and route) will also
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cd ${BOARD_BUILDDIR} && symbiflow_route -e ${TOP}.eblif -d ${DEVICE} -s ${SDC} 2>&1 > /dev/null
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Lines 33-37 (running ``symbiflow_write_fasm`` and ``symbiflow_write_bitstream``) typically do not change from design to design.
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A Note on the example designs use of ifeq/else ifeq blocks
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-------------------------------------------------------------
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If you look at many of the Makefiles from the example designs within symbiflow (i.e. counter-test, Picosoc, etc.), you will find an ifeq else ifeq block. The following snippet is from lines 9-39 of `the Makefile from Counter-test <https://github.com/SymbiFlow/symbiflow-examples/blob/master/xc7/counter_test/Makefile>`_:
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.. code-block:: bash
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:name: counter-test Makefile snippet
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ifeq ($(TARGET),arty_35)
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PARTNAME := xc7a35tcsg324-1
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XDC:=${current_dir}/arty.xdc
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BOARD_BUILDDIR := ${BUILDDIR}/arty_35
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else ifeq ($(TARGET),arty_100)
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PARTNAME:= xc7a100tcsg324-1
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XDC:=${current_dir}/arty.xdc
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DEVICE:= xc7a100t_test
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BOARD_BUILDDIR := ${BUILDDIR}/arty_100
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else ifeq ($(TARGET),nexys4ddr)
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PARTNAME:= xc7a100tcsg324-1
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XDC:=${current_dir}/nexys4ddr.xdc
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DEVICE:= xc7a100t_test
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BOARD_BUILDDIR := ${BUILDDIR}/nexys4ddr
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else ifeq ($(TARGET),zybo)
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PARTNAME:= xc7z010clg400-1
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XDC:=${current_dir}/zybo.xdc
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DEVICE:= xc7z010_test
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BITSTREAM_DEVICE:= zynq7
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BOARD_BUILDDIR := ${BUILDDIR}/zybo
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VERILOG:=${current_dir}/counter_zynq.v
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else ifeq ($(TARGET),nexys_video)
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PARTNAME:= xc7a200tsbg484-1
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XDC:=${current_dir}/nexys_video.xdc
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DEVICE:= xc7a200t_test
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BOARD_BUILDDIR := ${BUILDDIR}/nexys_video
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else
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PARTNAME:= xc7a35tcpg236-1
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XDC:=${current_dir}/basys3.xdc
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BOARD_BUILDDIR := ${BUILDDIR}/basys3
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endif
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This snippet of code is an if else block used to set the specific PARTNAME and DEVICE parameters for different types of hardware. Since each FPGA has a unique pin configuration, the block also defines a constraint file specific to the hardware being used (i.e. ``basys3.xdc``, ``nexys_video.xdc``). The code block determines what type of hardware is being used based upon a TARGET variable which is assumed to be defined before running make. For example, you may recall running ``TARGET="<board type>" make -C counter_test`` before building the counter-test example. This command sets the TARGET variable to the type of hardware you are using.
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The if else block is completely optional. If you are only using one type of hardware for your designs then you could just use something similar to lines 5, 9 and 10 in our example:
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.. code-block:: bash
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:name: device-partname-snippet
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DEVICE := xc7a50t_test
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PARTNAME:= xc7a35tcpg236-1
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XDC:=${current_dir}/<name of XDC file>
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If you plan on using multiple types of hardware for your designs, then it might be better to just copy the if else blocks from one of the symbiflow-examples. Note that you may need to change the names for the XDC or PCF+SDC parameters to match the names you have used. Also remember that you will need to set the TARGET variable before running make on your design.
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@ -54,7 +54,7 @@ Finally, activate your Conda environment:
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Preparing Your Design
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----------------------
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Building a design in symbiflow requires three parts, the HDL files for your design, a constraints file, and a Makefile. For simplicity, all three of these design files should be moved to a single directory. The location of the directory does not mater as long as the three design files are all within said directory.
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Building a design in symbiflow requires three parts, the HDL files for your design, a constraints file, and a Makefile. For simplicity, all three of these design files should be moved to a single directory. The location of the directory does not mater as long as the three design files are all within it.
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HDL Files
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++++++++++
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@ -71,7 +71,7 @@ Makefile
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+++++++++
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To learn about how Makefiles in symbiflow work, see `Understanding the Makefile in Symbiflow <Understanding-Makefile.html>`_ page.
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If you have used verilog as your HDL and an XDC as your constraint, you can add this :download:`Makefile <master_makefile/Makefile>` to your design directory instead of building your own. If you have used a different HDL or constraint file you can find instructions for how to create a makefile for these designs in `Understanding the Makefile in Symbiflow <Understanding-Makefile.html>`_ page.
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If you have used verilog as your HDL and an XDC as your constraint, you can add this :download:`Makefile <master_makefile/Makefile>` to your design directory instead of building your own. If you have used a different HDL than verilog or have used a combination of PCF+SDC constraint files, you can find instructions for how to modify the provided makefile or create your own in `Understanding the Makefile in Symbiflow <Understanding-Makefile.html>`_.
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Building your personal projects
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