147 lines
4.8 KiB
ReStructuredText
147 lines
4.8 KiB
ReStructuredText
Using Symbiflow to upload your own designs
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===========================================
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This section describes how to upload you're own designs to an FPGA from start to finish using only open source tools.
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Preparing your environment
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----------------------------
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Before building any example, set the installation directory to match what you
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set it to earlier, for example:
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.. code-block:: bash
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:name: export-install-dir
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export INSTALL_DIR=~/opt/symbiflow
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Select your FPGA family:
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.. tabs::
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.. group-tab:: Artix-7
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.. code-block:: bash
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:name: fpga-fam-xc7
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FPGA_FAM="xc7"
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.. group-tab:: EOS S3
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.. code-block:: bash
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:name: fpga-fam-eos-s3
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FPGA_FAM="eos-s3"
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Next, prepare the environment:
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.. code-block:: bash
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:name: conda-prep-env
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export PATH="$INSTALL_DIR/$FPGA_FAM/install/bin:$PATH";
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source "$INSTALL_DIR/$FPGA_FAM/conda/etc/profile.d/conda.sh"
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Finally, enter your working Conda environment:
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.. code-block:: bash
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:name: conda-act-env
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conda activate $FPGA_FAM
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.. note::
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You will need to run the commands for preparing your conda environment each time you open a new terminal. You will also need to activate the Conda environment for your hardware before you attempt to build your designs. It might be a good idea to add the above commands to your ``.bashrc`` either as functions or aliases to save yourself some repetitive typing.
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Preparing Your Design
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----------------------
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Building a design in symbiflow requires three simple parts, the HDL files for your design, a constraints file, and a Makefile. For simplicity, all three of these design parts should be moved to a single directory.
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HDL files
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++++++++++
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Symbiflow provides support for both Verilog and SystemVerilog HDL code. Use whichever method you prefer and add your design files to the directory of choice. If you are using the provided Makefiles to build your design, your top level module should be declared as ``module top (...``. Failure to do so will result in an error during the build process stating something to the effect of ``ERROR: Module 'top' not found!``
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Constraint file
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++++++++++++++++
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The Symbiflow tool chain supports both .XDC and .PCF+.SDC formats for constraint files. Use whichever method you prefer and add your constraint file(s) to the design directory.
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Makefile
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+++++++++
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To learn about how Makefiles in symbiflow work, see the `Understanding the Makefile in Symbiflow <Understanding-Makefile.html>`_ page.
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If you have used verilog as your HDL and an XDC as your constraint, you can add this :download:`Makefile <master_makefile/Makefile>` to your design directory instead of building your own.
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Building your personal projects
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-------------------------------
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Before you begin building your design, navigate to the directory where you have stored your Makefile, HDL, and constraint files:
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.. code-block:: bash
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:name: your-directory
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cd <path to your directory>
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Then, depending on your board type run:
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.. tabs::
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.. group-tab:: Arty_35T
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.. code-block:: bash
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:name: example-counter-a35t-group
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TARGET="arty_35" make -C .
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.. group-tab:: Arty_100T
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.. code-block:: bash
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:name: example-counter-a100t-group
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TARGET="arty_100" make -C .
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.. group-tab:: Nexus4
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.. code-block:: bash
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:name: example-counter-nexys4ddr-group
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TARGET="nexys4ddr" make -C .
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.. group-tab:: Basys3
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.. code-block:: bash
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:name: example-counter-basys3-group
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TARGET="basys3" make -C .
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If your design builds without error, the bitstream can be found in the following location:
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.. code-block:: bash
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cd build/<board>
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Once you navigate to the directory containing the bitstream, use the following commands on the **Arty and Basys3** to upload the design to your board:
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.. code-block:: bash
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openocd -f ${INSTALL_DIR}/${FPGA_FAM}/conda/envs/${FPGA_FAM}/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit"
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.. tip::
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Many of the commands needed to build a project are run multiple times with little to no variation. You might consider adding a few aliases or even a few bash functions to your .bashrc file to save yourself some typing or repeated copy/paste.
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For example, instead of using the somewhat cumbersome command used to upload the bitstream to Xilinx 7 series FPGA every time, you could just add the following lines to your bashrc file:
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.. code-block:: bash
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:name: bash-functions
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symbi_bit() {
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#Creates and downloads the bitstream to Xilinx 7 series FPGA:
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openocd -f <Your install directory>/xc7/conda/envs/xc7/share/openocd/scripts/board/digilent_arty.cfg -c "init; pld load 0 top.bit; exit"
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}
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Now whenever you need to download a bitstream to the Xilinx-7 series you can simply type ``symbi_bit`` into the terminal and hit enter.
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