f4pga-examples/eos-s3/btn_counter
Unai Martinez-Corral ea9698e82a common/requirements: bump f4pga
Signed-off-by: Unai Martinez-Corral <umartinezcorral@antmicro.com>
2022-08-03 13:04:25 +02:00
..
Makefile common/requirements: bump f4pga 2022-08-03 13:04:25 +02:00
README.rst docs/building-examples: export FPGA_FAM 2022-08-02 11:57:04 +02:00
btn_counter.v formatted files 2021-05-13 12:07:40 -06:00
chandalar.pcf eos-s3: btn_counter: fix pcf after bumping VPR 2022-06-07 15:02:34 +02:00
dummy.sdc eos-s3/environment: update 2022-07-31 20:10:02 +02:00
flow.json eos-s3: btn_counter: use F4PGA build flow by default 2022-08-01 17:54:29 +02:00

README.rst

Button counter
~~~~~~~~~~~~~~

This example design features a simple 4-bit counter driving LEDs. To build the
counter example, run the following command:

.. code-block:: bash
   :name: eos-s3-counter

   make -C btn_counter