platforms: eos-s3: add fasm2bels stage
Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
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29b6757fd7
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@ -19,7 +19,8 @@
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"sdc-in": "eos-s3/btn_counter/dummy.sdc"
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},
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"values": {
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"part": "ql-eos-s3"
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"part": "ql-eos-s3",
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"part_name": "PD64"
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}
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}
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}
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@ -17,7 +17,8 @@
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"bitstream_bitheader": "common:generic_script_wrapper",
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"bitstream_binary": "common:generic_script_wrapper",
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"bitstream_jlink": "common:generic_script_wrapper",
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"bitstream_openocd": "common:generic_script_wrapper"
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"bitstream_openocd": "common:generic_script_wrapper",
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"fasm2bels": "common:generic_script_wrapper"
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},
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"values": {
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@ -426,6 +427,47 @@
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"#3": "${:iomux_binary}"
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}
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}
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},
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"fasm2bels": {
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"params": {
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"stage_name": "fasm2bels",
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"script": "symbiflow_fasm2bels",
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"outputs": {
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"fasm2bels_verilog": {
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"mode": "file",
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"file": "${:bitstream}.v",
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"target": "${:bitstream}.v"
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},
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"fasm2bels_pcf": {
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"mode": "file",
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"file": "${:bitstream}.pcf",
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"target": "${:bitstream}.pcf"
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},
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"fasm2bels_qcf": {
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"mode": "file",
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"file": "${:bitstream}.qcf",
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"target": "${:bitstream}.qcf"
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},
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"fasm2bels_log": {
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"mode": "stdout",
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"target": "${:bitstream}.log"
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}
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},
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"inputs": {
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"device": "${device}",
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"part": "${part_name}",
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"pcf": "${:pcf}",
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"bit": "${:bitstream}",
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"out-verilog": "${:bitstream}.v",
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"out-pcf": "${:bitstream}.pcf",
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"out-qcf": "${:bitstream}.qcf",
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"$F4PGA_INSTALL_DIR": "${shareDir}/../../../../",
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"$FPGA_FAM": "eos-s3",
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"$PATH": "${shareDir}/../../../conda/envs/eos-s3/bin/:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin",
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"$SHARE_DIR_PATH": "${shareDir}",
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"$BIN_DIR_PATH": "${binDir}"
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}
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}
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}
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}
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}
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@ -21,8 +21,8 @@ set -e
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SHARE_DIR_PATH=${SHARE_DIR_PATH:="$F4PGA_SHARE_DIR"}
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BIN_DIR_PATH=${BIN_DIR_PATH:="$F4PGA_BIN_DIR"}
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OPTS=d:P:p:b:
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LONGOPTS=device:,part:,pcf:,bit:,
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OPTS=d:P:p:b:v:o:q
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LONGOPTS=device:,part:,pcf:,bit:,out-verilog:,out-pcf:,out-qcf:,
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PARSED_OPTS=`getopt --options=${OPTS} --longoptions=${LONGOPTS} --name $0 -- "$@"`
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eval set -- "${PARSED_OPTS}"
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@ -31,6 +31,9 @@ DEVICE=""
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PART=""
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PCF=""
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BIT=""
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OUT_VERILOG=""
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OUT_PCF=""
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OUT_QCF=""
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while true; do
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case "$1" in
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@ -50,6 +53,18 @@ while true; do
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BIT=$2
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shift 2
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;;
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-v|--out-verilog)
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OUT_VERILOG=$2
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shift 2
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;;
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-o|--out-pcf)
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OUT_PCF=$2
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shift 2
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;;
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-q|--out-qcf)
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OUT_QCF=$2
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shift 2
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;;
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--)
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break
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;;
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@ -67,27 +82,26 @@ if [ -z $BIT ]; then
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fi
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# Run fasm2bels
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if [[ "$DEVICE" =~ ^(ql-eos-s3|ql-pp3e)$ ]]; then
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VPR_DB=`readlink -f ${SHARE_DIR_PATH}/arch/${DEVICE}_wlcsp/db_phy.pickle`
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FASM2BELS=`readlink -f ${SHARE_DIR_PATH}/scripts/fasm2bels.py`
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FASM2BELS_DEVICE=${DEVICE/ql-/}
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VERILOG_FILE="${BIT}.v"
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PCF_FILE="${BIT}.v.pcf"
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QCF_FILE="${BIT}.v.qcf"
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if [ ! -z "{PCF}" ]; then
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PCF_ARGS="--input-pcf ${PCF}"
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else
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PCF_ARGS=""
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fi
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echo "Running fasm2bels"
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`which python3` ${FASM2BELS} ${BIT} --phy-db ${VPR_DB} --device-name ${FASM2BELS_DEVICE} --package-name ${PART} --input-type bitstream --output-verilog ${VERILOG_FILE} ${PCF_ARGS} --output-pcf ${PCF_FILE} --output-qcf ${QCF_FILE}
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else
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# $DEVICE is not ql-eos-s3 or ql-pp3e
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if ! [[ "$DEVICE" =~ ^(ql-eos-s3|ql-pp3e)$ ]]; then
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echo "ERROR: Unsupported device '${DEVICE}' for fasm2bels"
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exit -1
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fi
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# Run fasm2bels
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VPR_DB=`readlink -f ${SHARE_DIR_PATH}/arch/${DEVICE}_wlcsp/db_phy.pickle`
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FASM2BELS=`readlink -f ${SHARE_DIR_PATH}/scripts/fasm2bels.py`
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FASM2BELS_DEVICE=${DEVICE/ql-/}
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VERILOG_FILE="${OUT_VERILOG:-$BIT.v}"
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PCF_FILE="${OUT_PCF:-$BIT.v.pcf}"
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QCF_FILE="${OUT_QCF:-$BIT.v.qcf}"
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if [ ! -z "{PCF}" ]; then
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PCF_ARGS="--input-pcf ${PCF}"
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else
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PCF_ARGS=""
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fi
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echo "Running fasm2bels"
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`which python3` ${FASM2BELS} ${BIT} --phy-db ${VPR_DB} --device-name ${FASM2BELS_DEVICE} --package-name ${PART} --input-type bitstream --output-verilog ${VERILOG_FILE} ${PCF_ARGS} --output-pcf ${PCF_FILE} --output-qcf ${QCF_FILE}
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